公开(公告)号：US20160342198A1

公开(公告)日：2016-11-24

申请号：US14845879

申请日：2015-09-04

Applicant: MediaTek Inc.

Inventor： Jih-Ming HSU ,  Yen-Lin LEE ,  Jia-Ming CHEN ,  Shih-Yen CHIU ,  Chung-Ho CHANG ,  Ya-Ting CHANG ,  Ming-Hsien LEE

IPC: G06F1/32

CPC classification number: G06F1/3296 ,  G06F1/324 ,  Y02D10/126 ,  Y02D10/172

Abstract: A computing system includes a multi-core processor and a core controller. The core controller is for: monitoring utilization of the multi-core processor; calculating a target performance index according to the utilization of the multi-core processor, a target utilization and a first performance index, wherein the first performance index is associated with a first entry of a dynamic voltage frequency scaling (DVFS) table that corresponds to a current setting for the multi-core processor; and selecting a second entry of the DVFS table that corresponds to a target-setting according to the target performance index and a second performance index that is associated with the second entry. The target-setting is used to configure the multi-core processor.

Abstract translation: 计算系统包括多核处理器和核心控制器。 核心控制器用于：监控多核处理器的利用率; 根据多核处理器的利用率，目标利用率和第一性能指标来计算目标性能指标，其中所述第一性能指标与动态电压频率缩放（DVFS）表的第一项相关联，所述动态电压频率缩放（DVFS）表对应于 多核处理器的当前设置; 以及根据所述目标性能指标和与所述第二条目相关联的第二性能指标来选择对应于目标设置的所述DVFS表的第二条目。 目标设置用于配置多核处理器。