公开(公告)号：US20160276274A1

公开(公告)日：2016-09-22

申请号：US15168519

申请日：2016-05-31

Applicant: MediaTek Inc.

Inventor： Ching-Chung KO ,  Tao CHENG ,  Tien-Yueh LIU ,  Ta-Hsi CHOU ,  Peng-Cheng KAO ,  Ling-Wei KE

IPC: H01L23/528 ,  H01L23/58 ,  H01L23/522 ,  H01L23/532 ,  H01L23/00

CPC classification number: H01L23/5286 ,  H01L21/823475 ,  H01L23/5226 ,  H01L23/53228 ,  H01L23/585 ,  H01L24/05 ,  H01L2224/05124 ,  H01L2924/0002 ,  H01L2924/14 ,  H01L2924/00

Abstract: An integrated circuit chip includes a semiconductor substrate having thereon a plurality of inter-metal dielectric (IMD) layers and a plurality of first conductive layers embedded in respective said plurality of IMD layers, wherein said first conductive layers comprise copper; a first insulating layer overlying said plurality of IMD layers and said plurality of first conductive layers; at least a first wiring line in a second conductive layer overlying said first insulating layer, for distributing power signal or ground signal, wherein said second conductive layer comprise aluminum; and at least a second wiring line in a third conductive layer overlying said second conductive layer, for distributing power signal or ground signal.

Abstract translation: 集成电路芯片包括其上具有多个金属间电介质（IMD）层的半导体衬底和嵌入在所述多个IMD层中的多个第一导电层，其中所述第一导电层包括铜; 覆盖所述多个IMD层和所述多个第一导电层的第一绝缘层; 覆盖所述第一绝缘层的第二导电层中的至少第一布线，用于分配功率信号或接地信号，其中所述第二导电层包括铝; 以及覆盖所述第二导电层的第三导电层中的至少第二布线，用于分配电力信号或接地信号。