公开(公告)号：US20160217243A1

公开(公告)日：2016-07-28

申请号：US14986275

申请日：2015-12-31

Applicant: MediaTek Inc.

Inventor： Zwei-Mei LEE ,  Bo-Jr HUANG ,  Chi-Jih SHIH ,  Jia-Wei FANG

IPC: G06F17/50

CPC classification number: G06F17/5072 ,  G06F17/5009 ,  G06F17/505 ,  G06F2217/78

Abstract: A method for distributing power in the layout of an integrated circuit is provided. The integrated circuit includes at least one macro block. A first physical layout of the macro block is obtained, wherein the macro block includes a plurality of standard cells. The first physical layout is divided into a plurality of partitions according to an IR simulation result of the first physical layout. A plurality of power isolation cells are inserted between the partitions. A second physical layout is obtained according to the partitions and the power isolation cells. A macro placement of the macro block is obtained according to the second physical layout. Each of the partitions further includes a low drop out (LDO) regulator.

Abstract translation: 提供了一种用于在集成电路的布局中分配功率的方法。 集成电路包括至少一个宏块。 获得宏块的第一物理布局，其中宏块包括多个标准单元。 根据第一物理布局的IR仿真结果将第一物理布局分成多个分区。 多个电源隔离单元插入分区之间。 根据分区和电源隔离单元获得第二个物理布局。 根据第二物理布局获得宏块的宏放置。 每个分区还包括一个低压降（LDO）调节器。