FAST POWER CONTROL MECHANISM FOR MULTI USERS

    公开(公告)号:US20250044857A1

    公开(公告)日:2025-02-06

    申请号:US18786986

    申请日:2024-07-29

    Applicant: MEDIATEK INC.

    Abstract: A chipset holds a first hardware semaphore to indicate that a processing subsystem is powered off. This first hardware semaphore coordinates power states between a driver and the processing subsystem. The chipset releases the first hardware semaphore when the processing subsystem is powered on. This release allows the driver to operate on a hardware component associated with the processing subsystem. The chipset attempts to acquire the first hardware semaphore by the processing subsystem before powering off. The chipset powers off the processing subsystem upon successfully acquiring the first hardware semaphore.

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