公开(公告)号：US20240364633A1

公开(公告)日：2024-10-31

申请号：US18307830

申请日：2023-04-27

Applicant: Mellanox Technologies, Ltd.

Inventor： Michael Weiner ,  Amit Hermony ,  Avi Urman ,  Idan Burstein ,  Yuval Shpigelman

IPC: H04L47/122 ,  H04L43/0852 ,  H04L47/11

CPC classification number: H04L47/122 ,  H04L43/0852 ,  H04L47/11

Abstract: A network device includes one or more ports, processing circuitry, and a memory-network congestion controller. The one or more ports are to connect to a network. The processing circuitry is to run a plurality of processing tasks that access a shared memory, one or more of the processing tasks including communicating one or more packet flows over the network. The memory-network congestion controller is to identify a memory-access congestion, which occurs in accessing the shared memory by one or more of the processing tasks, and to alleviate the memory-access congestion by causing a reduction in a communication rate of at least one of the packet flows.