公开(公告)号：US20240370242A1

公开(公告)日：2024-11-07

申请号：US18309987

申请日：2023-05-01

Applicant: Mellanox Technologies, Ltd.

Inventor： Alan Lo ,  Krishna Garlapati ,  Stephen Warren ,  Emre Orbay ,  Alexander Efimov

IPC: G06F8/51 ,  G06F9/30

Abstract: Systems and methods to perform per-register bin packing are disclosed. A system may include a memory and one or more processors coupled to the memory. The one or more processors may determine a first live range of a first variable in a source code and a second live range of a second variable in the source code. The first live range and the second live range may overlap in time during execution of an output code. The one or more processors may generate the output code including a first instruction for the first variable and a second instruction for the second variable. The first instruction may include a first register identifier, a first mask, and a first offset. The second instruction may include the first register identifier, a second mask, and a second offset.

公开(公告)号：US20250077375A1

公开(公告)日：2025-03-06

申请号：US18457939

申请日：2023-08-29

Applicant: Mellanox Technologies, Ltd.

Inventor： Alan Lo ,  Krishna Garlapati ,  Stephen Warren ,  Doren Ofek ,  Matan Azrad

IPC: G06F11/263 ,  H04L1/1829

Abstract: A system includes a network device. The network device is to receive a packet comprising metadata. Responsive to determining that an entry in a match action table matches a match action lookup tuple based on the metadata, identify a debug instruction associated with the entry, the entry in the match action table identifying an action to be performed with respect to the packet. The debug instruction is executed. At least a portion of the debug instruction is executed prior to performing the action identified in the entry of the action table.