公开(公告)号：US09057908B2

公开(公告)日：2015-06-16

申请号：US13371484

申请日：2012-02-13

申请人： Chih-Chung Liu ,  Meng-Chieh Tai ,  Ming-Tsung Wang ,  De-Jiun Li

发明人： Chih-Chung Liu ,  Meng-Chieh Tai ,  Ming-Tsung Wang ,  De-Jiun Li

IPC分类号： G02B5/22 ,  G02F1/133 ,  G02F1/1335 ,  G02B5/20 ,  G02F1/1333

CPC分类号： G02F1/133514 ,  G02B5/201 ,  G02F2001/133388 ,  G02F2201/52

摘要： A color filter substrate includes a transparent substrate, a patterned light-shielding layer, a plurality of color filter units, and a plurality of dummy color filter units. The transparent substrate has a display region and a peripheral region surrounding the display region. The patterned light-shielding layer is disposed on the transparent substrate, and the patterned light-shielding layer includes a first light-shielding pattern disposed on the display region and a second light-shielding pattern disposed on the peripheral region. The first light-shielding pattern defines a plurality of sub-pixel regions. The color filter units are disposed on the display region. The dummy color filter units are disposed on the peripheral region. Spacing between two adjacent dummy color filter units or spacing between the color filter unit and the adjacent dummy color filter unit is wider than spacing between two adjacent color filter units.

摘要翻译： 滤色器基板包括透明基板，图案化遮光层，多个滤色器单元和多个虚拟滤色器单元。 透明基板具有显示区域和围绕显示区域的周边区域。 所述图案遮光层设置在所述透明基板上，所述图案遮光层包括布置在所述显示区域上的第一遮光图案和设置在所述周边区域上的第二遮光图案。 第一遮光图案限定多个子像素区域。 滤色器单元设置在显示区域上。 虚设滤色器单元设置在周边区域上。 两个相邻的虚拟滤色器单元之间的间隔或滤色器单元与相邻的虚拟滤色器单元之间的间隔比两个相邻的滤色器单元之间的间距宽。

公开(公告)号：US08502945B2

公开(公告)日：2013-08-06

申请号：US12962673

申请日：2010-12-08

申请人： Meng-Chieh Tai ,  Ming-Tsung Wang ,  Chih-Chung Liu ,  De-Jiun Li

发明人： Meng-Chieh Tai ,  Ming-Tsung Wang ,  Chih-Chung Liu ,  De-Jiun Li

IPC分类号： G02F1/1343

CPC分类号： H01L27/1288 ,  G02F2001/134372 ,  H01L27/1214 ,  H01L27/124

摘要： An array substrate of a fringe field switching (FFS) mode liquid crystal display (LCD) panel and manufacturing method thereof are provided. The gate electrodes and the common electrode of the FFS mode LCD panel are formed on the array substrate by the same photolithographic process, and the common electrode, the gate lines and the gate electrodes are disposed on the same layer.

摘要翻译： 提供了边缘场切换（FFS）模式液晶显示（LCD）面板的阵列基板及其制造方法。 FFS模式LCD面板的栅电极和公共电极通过相同的光刻工艺形成在阵列基板上，公共电极，栅极线和栅电极设置在同一层上。

公开(公告)号：US20130155537A1

公开(公告)日：2013-06-20

申请号：US13371484

申请日：2012-02-13

申请人： Chih-Chung Liu ,  Meng-Chieh Tai ,  Ming-Tsung Wang ,  De-Jiun Li

发明人： Chih-Chung Liu ,  Meng-Chieh Tai ,  Ming-Tsung Wang ,  De-Jiun Li

IPC分类号： G02B5/22

CPC分类号： G02F1/133514 ,  G02B5/201 ,  G02F2001/133388 ,  G02F2201/52

摘要： A color filter substrate includes a transparent substrate, a patterned light-shielding layer, a plurality of color filter units, and a plurality of dummy color filter units. The transparent substrate has a display region and a peripheral region surrounding the display region. The patterned light-shielding layer is disposed on the transparent substrate, and the patterned light-shielding layer includes a first light-shielding pattern disposed on the display region and a second light-shielding pattern disposed on the peripheral region. The first light-shielding pattern defines a plurality of sub-pixel regions. The color filter units are disposed on the display region. The dummy color filter units are disposed on the peripheral region. Spacing between two adjacent dummy color filter units or spacing between the color filter unit and the adjacent dummy color filter unit is wider than spacing between two adjacent color filter units.

摘要翻译： 滤色器基板包括透明基板，图案化遮光层，多个滤色器单元和多个虚拟滤色器单元。 透明基板具有显示区域和围绕显示区域的周边区域。 所述图案遮光层设置在所述透明基板上，所述图案遮光层包括布置在所述显示区域上的第一遮光图案和设置在所述周边区域上的第二遮光图案。 第一遮光图案限定多个子像素区域。 滤色器单元设置在显示区域上。 虚设滤色器单元设置在周边区域上。 两个相邻的虚拟滤色器单元之间的间隔或滤色器单元与相邻的虚拟滤色器单元之间的间隔比两个相邻的滤色器单元之间的间距宽。

公开(公告)号：US20120092606A1

公开(公告)日：2012-04-19

申请号：US12962673

申请日：2010-12-08

申请人： Meng-Chieh Tai ,  Ming-Tsung Wang ,  Chih-Chung Liu ,  De-Jiun Li

发明人： Meng-Chieh Tai ,  Ming-Tsung Wang ,  Chih-Chung Liu ,  De-Jiun Li

IPC分类号： G02F1/1343 ,  H01L33/08

CPC分类号： H01L27/1288 ,  G02F2001/134372 ,  H01L27/1214 ,  H01L27/124

摘要： An array substrate of a fringe field switching (FFS) mode liquid crystal display (LCD) panel and manufacturing method thereof are provided. The gate electrodes and the common electrode of the FFS mode LCD panel are formed on the array substrate by the same photolithographic process, and the common electrode, the gate lines and the gate electrodes are disposed on the same layer.

摘要翻译： 提供了边缘场切换（FFS）模式液晶显示（LCD）面板的阵列基板及其制造方法。 FFS模式LCD面板的栅电极和公共电极通过相同的光刻工艺形成在阵列基板上，公共电极，栅极线和栅电极设置在同一层上。

公开(公告)号：US07916235B2

公开(公告)日：2011-03-29

申请号：US12793689

申请日：2010-06-04

申请人： Ming-Tsung Wang ,  Chih-Chung Liu ,  Yueh-Ping Chang ,  Meng-Chieh Tai

发明人： Ming-Tsung Wang ,  Chih-Chung Liu ,  Yueh-Ping Chang ,  Meng-Chieh Tai

IPC分类号： G02F1/136 ,  G02F1/1343

CPC分类号： G02F1/13624 ,  G02F2001/134354

摘要： A pixel structure suitable for being disposed on a substrate includes a thin film transistor (TFT), a first pixel electrode, a second pixel electrode, a scan line and a data line. The TFT disposed on the substrate includes a gate, a source, a first drain and a second drain. A main TFT is formed by the gate, the source and the first drain. A sub-thin film transistor (sub-TFT) is formed by the gate, the first drain and the second drain. The first pixel electrode is electrically connected to the first drain, and a portion of the first drain extends between the second pixel electrode and the substrate to form capacitor-coupling electrode. The second pixel electrode is electrically connected to the second drain of the sub-TFT. The scan line is disposed on the substrate and electrically connected to the gate, and the data line is electrically connected to the source.

摘要翻译： 适于设置在衬底上的像素结构包括薄膜晶体管（TFT），第一像素电极，第二像素电极，扫描线和数据线。 设置在基板上的TFT包括栅极，源极，第一漏极和第二漏极。 主TFT由栅极，源极和第一漏极形成。 子薄膜晶体管（sub-TFT）由栅极，第一漏极和第二漏极形成。 第一像素电极电连接到第一漏极，并且第一漏极的一部分在第二像素电极和衬底之间延伸以形成电容器耦合电极。 第二像素电极电连接到子TFT的第二漏极。 扫描线设置在基板上并电连接到栅极，并且数据线电连接到源极。

公开(公告)号：US20100237350A1

公开(公告)日：2010-09-23

申请号：US12793689

申请日：2010-06-04

申请人： Ming-Tsung Wang ,  Chih-Chung Liu ,  Yueh-Ping Chang ,  Meng-Chieh Tai

发明人： Ming-Tsung Wang ,  Chih-Chung Liu ,  Yueh-Ping Chang ,  Meng-Chieh Tai

IPC分类号： H01L33/16 ,  G02F1/136

CPC分类号： G02F1/13624 ,  G02F2001/134354

摘要： A pixel structure suitable for being disposed on a substrate includes a thin film transistor (TFT), a first pixel electrode, a second pixel electrode, a scan line and a data line. The TFT disposed on the substrate includes a gate, a source, a first drain and a second drain. A main TFT is formed by the gate, the source and the first drain. A sub-thin film transistor (sub-TFT) is formed by the gate, the first drain and the second drain. The first pixel electrode is electrically connected to the first drain, and a portion of the first drain extends between the second pixel electrode and the substrate to form capacitor-coupling electrode. The second pixel electrode is electrically connected to the second drain of the sub-TFT. The scan line is disposed on the substrate and electrically connected to the gate, and the data line is electrically connected to the source.

摘要翻译： 适于设置在衬底上的像素结构包括薄膜晶体管（TFT），第一像素电极，第二像素电极，扫描线和数据线。 设置在基板上的TFT包括栅极，源极，第一漏极和第二漏极。 主TFT由栅极，源极和第一漏极形成。 子薄膜晶体管（sub-TFT）由栅极，第一漏极和第二漏极形成。 第一像素电极电连接到第一漏极，并且第一漏极的一部分在第二像素电极和衬底之间延伸以形成电容器耦合电极。 第二像素电极电连接到子TFT的第二漏极。 扫描线设置在基板上并电连接到栅极，并且数据线电连接到源极。

公开(公告)号：US07755710B2

公开(公告)日：2010-07-13

申请号：US11840995

申请日：2007-08-19

申请人： Ming-Tsung Wang ,  Chih-Chung Liu ,  Yueh-Ping Chang ,  Meng-Chieh Tai

发明人： Ming-Tsung Wang ,  Chih-Chung Liu ,  Yueh-Ping Chang ,  Meng-Chieh Tai

IPC分类号： G02F1/136 ,  G02F1/1343

CPC分类号： G02F1/13624 ,  G02F2001/134354

摘要： A pixel structure includes a gate, a source, a first drain, a second drain, a third drain, a first pixel electrode, a second pixel electrode, a scan line and a data line. The gate, the source and the first drain form a first thin film transistor. The gate, the source and the second drain form a second thin film transistor. The gate, the second drain and the third drain form a sub-thin film transistor (sub-TFT). Additionally, the first pixel electrode is electrically connected to the first drain, and the second drain extends to a portion between the second pixel electrode and the substrate such that a capacitor-coupling electrode is formed. Moreover, the second pixel electrode is electrically connected to the third drain of the sub-TFT. The scan line is disposed on the substrate and electrically connected to the gate, and the data line is electrically connected to the source.

摘要翻译： 像素结构包括栅极，源极，第一漏极，第二漏极，第三漏极，第一像素电极，第二像素电极，扫描线和数据线。 栅极，源极和第一漏极形成第一薄膜晶体管。 栅极，源极和第二漏极形成第二薄膜晶体管。 栅极，第二漏极和第三漏极形成子薄膜晶体管（sub-TFT）。 此外，第一像素电极电连接到第一漏极，并且第二漏极延伸到第二像素电极和衬底之间的部分，使得形成电容器耦合电极。 此外，第二像素电极电连接到子TFT的第三漏极。 扫描线设置在基板上并电连接到栅极，并且数据线电连接到源极。

公开(公告)号：US20080303970A1

公开(公告)日：2008-12-11

申请号：US11840995

申请日：2007-08-19

申请人： Ming-Tsung Wang ,  Chih-Chung Liu ,  Yueh-Ping Chang ,  Meng-Chieh Tai

发明人： Ming-Tsung Wang ,  Chih-Chung Liu ,  Yueh-Ping Chang ,  Meng-Chieh Tai

IPC分类号： G02F1/133

CPC分类号： G02F1/13624 ,  G02F2001/134354

摘要： A pixel structure includes a gate, a source, a first drain, a second drain, a third drain, a first pixel electrode, a second pixel electrode, a scan line and a data line. The gate, the source and the first drain form a first thin film transistor. The gate, the source and the second drain form a second thin film transistor. The gate, the second drain and the third drain form a sub-thin film transistor (sub-TFT). Additionally, the first pixel electrode is electrically connected to the first drain, and the second drain extends to a portion between the second pixel electrode and the substrate such that a capacitor-coupling electrode is formed. Moreover, the second pixel electrode is electrically connected to the third drain of the sub-TFT. The scan line is disposed on the substrate and electrically connected to the gate, and the data line is electrically connected to the source.

摘要翻译： 像素结构包括栅极，源极，第一漏极，第二漏极，第三漏极，第一像素电极，第二像素电极，扫描线和数据线。 栅极，源极和第一漏极形成第一薄膜晶体管。 栅极，源极和第二漏极形成第二薄膜晶体管。 栅极，第二漏极和第三漏极形成子薄膜晶体管（sub-TFT）。 此外，第一像素电极电连接到第一漏极，并且第二漏极延伸到第二像素电极和衬底之间的部分，使得形成电容器耦合电极。 此外，第二像素电极电连接到子TFT的第三漏极。 扫描线设置在基板上并电连接到栅极，并且数据线电连接到源极。

公开(公告)号：US07508463B2

公开(公告)日：2009-03-24

申请号：US11609334

申请日：2006-12-12

申请人： Meng-Chieh Tai ,  Chih-Chung Liu ,  Yueh-Ping Chang

发明人： Meng-Chieh Tai ,  Chih-Chung Liu ,  Yueh-Ping Chang

IPC分类号： G02F1/136 ,  G02F1/1337 ,  G02F1/1343

CPC分类号： G02F1/13624 ,  G02F1/133707 ,  G02F1/136213 ,  G02F1/1393 ,  G02F2001/134345

摘要： A pixel structure suitable for being controlled by a scan line and a data line disposed on a thin film transistor (TFT) array substrate of a multi-domain vertical alignment (MVA) liquid crystal display is disclosed. The pixel structure includes a first TFT, a second TFT, a first pixel electrode, a second pixel electrode and a plurality of alignment members, wherein the first TFT and the second TFT are both electrically connected to the scan line and the data line. The first TFT has a first drain and the first pixel electrode is electrically connected to the first drain. The second TFT has a second drain and the second pixel electrode is floated over the second drain to form a coupling capacitor, while a voltage difference is established between the second pixel electrode and the first pixel electrode. The alignment members are disposed on the first and the second pixel electrode.

摘要翻译： 公开了适用于由多域垂直取向（MVA）液晶显示器的薄膜晶体管（TFT）阵列基板上的扫描线和数据线控制的像素结构。 像素结构包括第一TFT，第二TFT，第一像素电极，第二像素电极和多个对准部件，其中第一TFT和第二TFT都电连接到扫描线和数据线。 第一TFT具有第一漏极，并且第一像素电极电连接到第一漏极。 第二TFT具有第二漏极，并且第二像素电极浮在第二漏极上以形成耦合电容器，同时在第二像素电极和第一像素电极之间建立电压差。 对准构件设置在第一和第二像素电极上。

公开(公告)号：US20080088783A1

公开(公告)日：2008-04-17

申请号：US11609334

申请日：2006-12-12

申请人： Meng-Chieh Tai ,  Chih-Chung Liu ,  Yueh-Ping Chang

发明人： Meng-Chieh Tai ,  Chih-Chung Liu ,  Yueh-Ping Chang

IPC分类号： G02F1/1337

CPC分类号： G02F1/13624 ,  G02F1/133707 ,  G02F1/136213 ,  G02F1/1393 ,  G02F2001/134345

摘要： A pixel structure suitable for being controlled by a scan line and a data line disposed on a thin film transistor (TFT) array substrate of a multi-domain vertical alignment (MVA) liquid crystal display is disclosed. The pixel structure includes a first TFT, a second TFT, a first pixel electrode, a second pixel electrode and a plurality of alignment members, wherein the first TFT and the second TFT are both electrically connected to the scan line and the data line. The first TFT has a first drain and the first pixel electrode is electrically connected to the first drain. The second TFT has a second drain and the second pixel electrode is floated over the second drain to form a coupling capacitor, while a voltage difference is established between the second pixel electrode and the first pixel electrode. The alignment members are disposed on the first and the second pixel electrode.

摘要翻译： 公开了适用于由多域垂直取向（MVA）液晶显示器的薄膜晶体管（TFT）阵列基板上的扫描线和数据线控制的像素结构。 像素结构包括第一TFT，第二TFT，第一像素电极，第二像素电极和多个对准部件，其中第一TFT和第二TFT都电连接到扫描线和数据线。 第一TFT具有第一漏极，并且第一像素电极电连接到第一漏极。 第二TFT具有第二漏极，并且第二像素电极浮在第二漏极上以形成耦合电容器，同时在第二像素电极和第一像素电极之间建立电压差。 对准构件设置在第一和第二像素电极上。