公开(公告)号：US20080211619A1

公开(公告)日：2008-09-04

申请号：US12030281

申请日：2008-02-13

申请人： Michael Belman ,  Leonid Akhtman

发明人： Michael Belman ,  Leonid Akhtman

IPC分类号： H01C1/012

CPC分类号： H01C1/034 ,  H01C17/288

摘要： A chip resistor includes an insulating substrate 11, top terminal electrodes 12 formed on top surface of the substrate using silver-based cermet, bottom electrodes 13, resistive element 14 that is situated between the top terminal electrodes 12 and overlaps them partially, an optional internal protective coating 15 that covers resistive element 14 completely or partially, an external protective coating 16 that covers completely the internal protection coating 15 and partially covers top terminal electrodes 12, a plated layer of nickel 17 that covers face sides of the substrate, top 12 and bottom 13 electrodes, and overlaps partially external protective coating 16, finishing plated layer 18 that covers nickel layer 17. The overlap of nickel layer 17 and external protective layer 16 possesses a sealing property because of metallization of the edges of external protective layer 16 prior to the nickel plating process.

摘要翻译： 芯片电阻器包括绝缘基板11，使用银基金属陶瓷在基板的顶表面上形成的顶部端子电极12，底部电极13，位于顶部端子电极12之间并与其部分重叠的电阻元件14，可选内部 完全或部分覆盖电阻元件14的保护涂层15，完全覆盖内部保护涂层15并且部分地覆盖顶部端子电极12的外部保护涂层16，覆盖基底的正面的镍17的镀层，顶部12和 底部13个电极，并且重叠部分外部保护涂层16，覆盖镍层17的整理镀层18。 镍层17和外部保护层16的重叠由于在镀镍过程之前的外部保护层16的边缘的金属化而具有密封性。

公开(公告)号：US08514051B2

公开(公告)日：2013-08-20

申请号：US13185065

申请日：2011-07-18

申请人： Michael Belman ,  Leonid Akhtman

发明人： Michael Belman ,  Leonid Akhtman

IPC分类号： H01C1/012

CPC分类号： H01C1/034 ,  H01C17/288

摘要： A chip resistor includes an insulating substrate 11, top terminal electrodes 12 formed on top surface of the substrate using silver-based cermet, bottom electrodes 13, resistive element 14 that is situated between the top terminal electrodes 12 and overlaps them partially, an optional internal protective coating 15 that covers resistive element 14 completely or partially, an external protective coating 16 that covers completely the internal protection coating 15 and partially covers top terminal electrodes 12, a plated layer of nickel 17 that covers face sides of the substrate, top 12 and bottom 13 electrodes, and overlaps partially external protective coating 16, finishing plated layer 18 that covers nickel layer 17. The overlap of nickel layer 17 and external protective layer 16 possesses a sealing property because of metallization of the edges of external protective layer 16 prior to the nickel plating process.

摘要翻译： 芯片电阻器包括绝缘基板11，使用银基金属陶瓷在基板的顶表面上形成的顶部端子电极12，底部电极13，位于顶部端子电极12之间并与其部分重叠的电阻元件14，可选内部 完全或部分覆盖电阻元件14的保护涂层15，完全覆盖内部保护涂层15并且部分地覆盖顶部端子电极12的外部保护涂层16，覆盖基底的正面的镍17的镀层，顶部12和 底部13个电极，并且部分地覆盖外部保护涂层16，覆盖镍层17的整理镀层18.镍层17和外部保护层16的重叠由于外部保护层16的边缘的金属化而具有密封特性， 镀镍工艺。

公开(公告)号：US07982582B2

公开(公告)日：2011-07-19

申请号：US12030281

申请日：2008-02-13

申请人： Michael Belman ,  Leonid Akhtman

发明人： Michael Belman ,  Leonid Akhtman

IPC分类号： H01C1/012

CPC分类号： H01C1/034 ,  H01C17/288

摘要： A chip resistor includes an insulating substrate 11, top terminal electrodes 12 formed on top surface of the substrate using silver-based cermet, bottom electrodes 13, resistive element 14 that is situated between the top terminal electrodes 12 and overlaps them partially, an optional internal protective coating 15 that covers resistive element 14 completely or partially, an external protective coating 16 that covers completely the internal protection coating 15 and partially covers top terminal electrodes 12, a plated layer of nickel 17 that covers face sides of the substrate, top 12 and bottom 13 electrodes, and overlaps partially external protective coating 16, finishing plated layer 18 that covers nickel layer 17. The overlap of nickel layer 17 and external protective layer 16 possesses a sealing property because of metallization of the edges of external protective layer 16 prior to the nickel plating process.

摘要翻译： 芯片电阻器包括绝缘基板11，使用银基金属陶瓷在基板的顶表面上形成的顶部端子电极12，底部电极13，位于顶部端子电极12之间并与其部分重叠的电阻元件14，可选内部 完全或部分覆盖电阻元件14的保护涂层15，完全覆盖内部保护涂层15并且部分地覆盖顶部端子电极12的外部保护涂层16，覆盖基底的正面的镍17的镀层，顶部12和 底部13个电极，并且部分地覆盖外部保护涂层16，覆盖镍层17的整理镀层18.镍层17和外部保护层16的重叠由于外部保护层16的边缘的金属化而具有密封特性， 镀镍工艺。

公开(公告)号：US20120126934A1

公开(公告)日：2012-05-24

申请号：US13185065

申请日：2011-07-18

申请人： Michael Belman ,  Leonid Akhtman

发明人： Michael Belman ,  Leonid Akhtman

IPC分类号： H01C1/012 ,  B05D5/12 ,  C23C14/14

CPC分类号： H01C1/034 ,  H01C17/288

摘要： A chip resistor includes an insulating substrate 11, top terminal electrodes 12 formed on top surface of the substrate using silver-based cermet, bottom electrodes 13, resistive element 14 that is situated between the top terminal electrodes 12 and overlaps them partially, an optional internal protective coating 15 that covers resistive element 14 completely or partially, an external protective coating 16 that covers completely the internal protection coating 15 and partially covers top terminal electrodes 12, a plated layer of nickel 17 that covers face sides of the substrate, top 12 and bottom 13 electrodes, and overlaps partially external protective coating 16, finishing plated layer 18 that covers nickel layer 17. The overlap of nickel layer 17 and external protective layer 16 possesses a sealing property because of metallization of the edges of external protective layer 16 prior to the nickel plating process.

摘要翻译： 芯片电阻器包括绝缘基板11，使用银基金属陶瓷在基板的顶表面上形成的顶部端子电极12，底部电极13，位于顶部端子电极12之间并与其部分重叠的电阻元件14，可选内部 完全或部分覆盖电阻元件14的保护涂层15，完全覆盖内部保护涂层15并且部分地覆盖顶部端子电极12的外部保护涂层16，覆盖基底的正面的镍17的镀层，顶部12和 底部13个电极，并且部分地覆盖外部保护涂层16，覆盖镍层17的整理镀层18.镍层17和外部保护层16的重叠由于外部保护层16的边缘的金属化而具有密封特性， 镀镍工艺。

公开(公告)号：US20110260826A1

公开(公告)日：2011-10-27

申请号：US13127838

申请日：2009-08-11

申请人： Michael Belman

发明人： Michael Belman

IPC分类号： H01C1/14 ,  H01C17/00

CPC分类号： H01C1/16 ,  H01C13/02

摘要： Thermally stable four-terminal resistor (current sensor) is characterized by having the capacity to adjust both resistance and temperature coefficient of resistance (TCR), during manufacturing process. The four-terminal resistor includes 3 or 4 elementary resistors R1-R3 forming a closed loop. Resistor R1 is the principal low-ohmic value resistor. The terminals of resistor R1 serve as “Force” terminals of the four-terminal resistor. Resistors R2, R3 form a voltage divider intended to minimize the TCR of the four-terminal resistor and connected in parallel to resistor R1. The terminals of resistor R3 serve as “Sense” terminals of the four-terminal resistor. Resistor R2 may be split into two resistors: R2a, R2b to simplify the implementation of four-terminal resistor. Elementary resistors R1, R2 must have the same sign of TCR. Target resistance and TCR minimization in four-terminal resistor are reached by adjustment of resistance of the elementary resistors.

摘要翻译： 热稳定的四端电阻（电流传感器）的特征在于在制造过程中具有调节电阻和温度系数（TCR）的能力。 四端电阻器包括形成闭环的3或4个元件电阻器R1-R3。 电阻R1是主要的低电阻值电阻。 电阻R1的端子用作四端电阻的“强制”端子。 电阻器R2，R3形成分压器，用于最小化四端电阻器的TCR并与电阻器R1并联。 电阻R3的端子作为四端电阻的“感应”端子。 电阻R2可分为两个电阻：R2a，R2b，以简化四端电阻的实现。 基本电阻器R1，R2必须具有相同的TCR标志。 通过调整基本电阻的电阻可以达到四端电阻的目标电阻和TCR最小化。

公开(公告)号：US08581687B2

公开(公告)日：2013-11-12

申请号：US13127838

申请日：2009-08-11

申请人： Michael Belman

发明人： Michael Belman

IPC分类号： H01C1/14

CPC分类号： H01C1/16 ,  H01C13/02

摘要： Thermally stable four-terminal resistor (current sensor) is characterized by having the capacity to adjust both resistance and temperature coefficient of resistance (TCR), during manufacturing process. The four-terminal resistor includes 3 or 4 elementary resistors R1-R3 forming a closed loop. Resistor R1 is the principal low-ohmic value resistor. The terminals of resistor R1 serve as “Force” terminals of the four-terminal resistor. Resistors R2, R3 form a voltage divider intended to minimize the TCR of the four-terminal resistor and connected in parallel to resistor R1. The terminals of resistor R3 serve as “Sense” terminals of the four-terminal resistor. Resistor R2 may be split into two resistors: R2a, R2b to simplify the implementation of four-terminal resistor. Elementary resistors R1, R2 must have the same sign of TCR. Target resistance and TCR minimization in four-terminal resistor are reached by adjustment of resistance of the elementary resistors.

摘要翻译： 热稳定的四端电阻（电流传感器）的特征在于在制造过程中具有调节电阻和温度系数（TCR）的能力。 四端电阻器包括形成闭环的3或4个元件电阻器R1-R3。 电阻R1是主要的低电阻值电阻。 电阻R1的端子用作四端电阻的“强制”端子。 电阻器R2，R3形成分压器，用于最小化四端电阻器的TCR并与电阻器R1并联。 电阻R3的端子作为四端电阻的“感应”端子。 电阻R2可分为两个电阻：R2a，R2b，以简化四端电阻的实现。 基本电阻器R1，R2必须具有相同的TCR标志。 通过调整基本电阻的电阻可以达到四端电阻的目标电阻和TCR最小化。

公开(公告)号：US06873028B2

公开(公告)日：2005-03-29

申请号：US10002868

申请日：2001-11-15

申请人： Michael Belman

发明人： Michael Belman

IPC分类号： H01C13/02 ,  H01C7/00 ,  H01C7/06 ,  H01L29/00

CPC分类号： H01C7/006 ,  H01C7/06

摘要： A chip resistor comprising a substrate having opposite parallel symmetrical first and second surfaces, a central longitudinal plane of symmetry, separate and spaced first and second resistive layers on the first and second surfaces. The resistive layers are electrically connected in parallel to each other and the first and second surfaces of the substrate are symmetrically located with respect to and equidistant from a central longitudinal plane. Thus, when electrical current passes through the resistive layers, a temperature distribution within the substrate will be substantially symmetrical about the central longitudinal plane of the substrate for eliminating thermal bending thereof. The splitting of the surge current between two resistive layers results in the lower temperature in each resistive layer when compared with the temperature in the single resistive layer of the prior art chip resistor loaded by the same current.

摘要翻译： 一种芯片电阻器，包括具有相对的平行对称的第一和第二表面的基板，中心纵向对称平面，在第一和第二表面上分开且间隔开的第一和第二电阻层。 电阻层彼此平行地电连接，并且衬底的第一和第二表面相对于中心纵向平面对称地等距定位。 因此，当电流通过电阻层时，衬底内的温度分布将基本上对称于衬底的中心纵向平面，以消除其热弯曲。 与现有技术的由相同电流负载的芯片电阻器的单个电阻层中的温度相比，两个电阻层之间的浪涌电流的分离导致每个电阻层中的温度较低。