公开(公告)号：US07038257B2

公开(公告)日：2006-05-02

申请号：US10936016

申请日：2004-09-07

Applicant: Michael Casey ,  Hong Hao

Inventor： Michael Casey ,  Hong Hao

IPC: H01L27/10 ,  H01L23/02 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC classification number: H01L23/50 ,  H01L27/118 ,  H01L27/11898 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The invention provides a system and method for providing scalability in an integrated circuit (IC) having a package coupled to a die through package balls. The die includes a plurality of input/output (I/O) slots and a hardmac configured to implement a logic function. A patch board is included between the hardmac and the I/O slots, wherein the hardmac includes a plurality of attachment points. The hardmac is attached to the plurality of I/O slots through the patch board, wherein adjacent attachment points join to non-adjacent I/O slots through the patch board.

Abstract translation: 本发明提供了一种用于在集成电路（IC）中提供可扩展性的系统和方法，该集成电路具有通过封装球耦合到管芯的封装。 芯片包括多个输入/输出（I / O）槽和被配置为实现逻辑功能的硬件。 硬接口和I / O插槽之间包括接插板，其中硬件包括多个连接点。 硬盘通过接插板连接到多个I / O插槽，其中相邻的连接点通过接线板连接到不相邻的I / O插槽。

公开(公告)号：US20060049496A1

公开(公告)日：2006-03-09

申请号：US10936016

申请日：2004-09-07

Applicant: Michael Casey ,  Hong Hao

Inventor： Michael Casey ,  Hong Hao

IPC: H01L23/02

CPC classification number: H01L23/50 ,  H01L27/118 ,  H01L27/11898 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The invention provides a system and method for providing scalability in an integrated circuit (IC) having a package coupled to a die through package balls. The die includes a plurality of input/output (I/O) slots and a hardmac configured to implement a logic function. A patch board is included between the hardmac and the I/O slots, wherein the hardmac includes a plurality of attachment points. The hardmac is attached to the plurality of I/O slots through the patch board, wherein adjacent attachment points join to non-adjacent I/O slots through the patch board.

Abstract translation: 本发明提供了一种用于在集成电路（IC）中提供可扩展性的系统和方法，该集成电路具有通过封装球耦合到管芯的封装。 芯片包括多个输入/输出（I / O）槽和被配置为实现逻辑功能的硬件。 硬接口和I / O插槽之间包括接插板，其中硬件包括多个连接点。 硬盘通过接插板连接到多个I / O插槽，其中相邻的连接点通过接线板连接到不相邻的I / O插槽。

公开(公告)号：US20230046130A1

公开(公告)日：2023-02-16

申请号：US17867898

申请日：2022-07-19

Applicant: Michael Casey

Inventor： Michael Casey

IPC: A41D13/05 ,  A61F5/37 ,  A41D27/20

Abstract: A forearm support which includes at least a first cutout on an end of the support that can adequately maintain a beverage container in an upright position such that liquid present in the beverage container does not spill or empty out of the container through a top opening during use of the forearm support by a wearer.

公开(公告)号：US09774948B2

公开(公告)日：2017-09-26

申请号：US13580072

申请日：2011-02-18

Applicant: Michael Casey

Inventor： Michael Casey

IPC: H04R3/00 ,  G11B27/28 ,  G11B27/034 ,  G10L19/018 ,  H04N21/8358 ,  H04N21/84 ,  H04N21/462 ,  G06F17/30 ,  G06T1/00

CPC classification number: H04R3/00 ,  G11B27/034 ,  G11B27/28

Abstract: Systems and methods augment a target media with a plurality of source media. The target media and source media are processed to form time frequency distributions (TFDs). Target features are extracted from the associated TFD and source features are extracted from each of the associated source TFDs. The target features are segmented into temporal portions that are compared with each of the plurality of source features to determine one or more matched source features having nearest matches to the target feature segments. Portions of the source media associated with the matched source features are mixed with the target media to form an augmented target media, wherein the mixing is based upon a probabilistic mixing algorithm that uses a distance between the matched target feature and source features to define an amplitude of each portion of the source media.

公开(公告)号：USD740925S1

公开(公告)日：2015-10-13

申请号：US29518436

申请日：2015-02-24

Applicant: Michael Casey

Designer： Michael Casey

公开(公告)号：US20140087829A1

公开(公告)日：2014-03-27

申请号：US13629253

申请日：2012-09-27

Applicant: Brian Watkins ,  Michael Casey

Inventor： Brian Watkins ,  Michael Casey

IPC: A63F13/12 ,  A63F13/00

CPC classification number: G07F17/32 ,  G07F17/3267

Abstract: A gaming system, apparatus, and method are disclosed providing a free-spin bonus game, wherein the player's streaks of consecutive winning free spins are tracked throughout the bonus, with bonus enhancements or awards for achieving streaks of specified lengths. Some embodiments award additional free spins for win streaks. Other versions provide different numbers of additional spins awarded for each number of consecutive winning spins. Other embodiments provide different bonus features as an award for winning streaks, including credit prizes which may be fixed or variable, triggering a secondary bonus (such as a wheel spin or a pick bonus), or applying multiplier values to the reel-spin wins in the streak.

Abstract translation: 公开了一种提供免费旋转奖励游戏的游戏系统，装置和方法，其中，连续获胜的自由旋转的条纹在整个奖金中被跟踪，具有用于实现指定长度的条纹的奖励增强或奖励。 一些实施例为获胜条件授予额外的自由旋转。 其他版本提供不同数量的额外旋转，为每个连续获胜旋转数量。 其他实施例提供不同的奖励特征，作为获胜条件的奖励，包括可以是固定的或可变的信用奖励，触发辅助奖励（例如轮子旋转或拾取奖励），或者将乘数值应用于卷轴旋转胜利 连胜。

公开(公告)号：USD655357S1

公开(公告)日：2012-03-06

申请号：US29358563

申请日：2010-03-29

Applicant: Michael Casey ,  David Brodess

Designer： Michael Casey ,  David Brodess

公开(公告)号：USD631108S1

公开(公告)日：2011-01-18

申请号：US29357821

申请日：2010-03-17

Applicant: David Brodess ,  Michael Casey

Designer： David Brodess ,  Michael Casey

公开(公告)号：US07363608B2

公开(公告)日：2008-04-22

申请号：US11008854

申请日：2004-12-09

Applicant: Michael Casey

Inventor： Michael Casey

IPC: G06F17/50

CPC classification number: G01R31/2818 ,  H05K1/141 ,  H05K3/00 ,  H05K3/0005 ,  H05K2201/10212 ,  H05K2201/10325 ,  H05K2201/10689 ,  H05K2203/162

Abstract: A system and method are provided for accelerating development and debug of a printed circuit board (PCB) designed for use with a platform ASIC in advance of availability of a prototype sample of the platform ASIC. Aspects of the invention include a pin-out adapter card that implements a predefined pin-out of the ASIC and that hosts FPGA logic resources for emulating I/O functionality and some (or all) of the ASIC core logic; a PCB designed for use with the platform ASIC, wherein the PCB includes the predefined ASIC pin-out for eventually mating with the ASIC; and a socket having mating connectors on both sides for mating with the ASIC pin-out on the PCB and to the ASIC pin-out on the adapter card, respectively, for coupling the adapter card to the PCB, thereby enabling development and debug of the PCB prior to availability of ASIC samples.

Abstract translation: 提供了一种系统和方法，用于在平台ASIC的原型样本的可用性之前加速设计用于平台ASIC的印刷电路板（PCB）的开发和调试。 本发明的方面包括一个pin-out适配器卡，其实现ASIC的预定义引脚，并且承载用于仿真I / O功能的FPGA逻辑资源和一些（或全部）ASIC核心逻辑; 设计用于平台ASIC的PCB，其中PCB包括用于最终与ASIC交配的预定义的ASIC引脚输出; 以及一个插座，其两侧具有匹配的连接器，用于与PCB上的ASIC引脚分配和适配卡上的ASIC引脚分别相配合，以将适配器卡耦合到PCB，从而可以开发和调试 PCB在ASIC样品可用之前。

公开(公告)号：US20060252492A1

公开(公告)日：2006-11-09

申请号：US11479215

申请日：2006-06-30

Applicant: Peter Anderson ,  Michael Casey ,  Erica Frohm ,  Jason Gilmore ,  Damon Gura ,  Darryl Hughes ,  Joel Jaffe ,  Ian Simmons

Inventor： Peter Anderson ,  Michael Casey ,  Erica Frohm ,  Jason Gilmore ,  Damon Gura ,  Darryl Hughes ,  Joel Jaffe ,  Ian Simmons

IPC: A63F9/24

CPC classification number: G07F17/3244 ,  G07F17/32 ,  G07F17/3267 ,  G07F17/3295

Abstract: A gaming machine comprises at least one visual display (mechanical or video) and a game of chance controlled by a processor in response to a wager. The game of chance includes a primary game and a sorting feature. The sorting feature is triggered by certain start-feature outcomes of the primary game. The sorting feature includes a collection of scrambled objects, such as letters, symbols, pictures, or puzzle pieces, that are at least partially sorted during operation of the sorting feature. The sorting feature generates an award, such as a payoff, a payoff multiplier, or extended play, if the sorted objects match predetermined criteria.