Very high speed line adapter for a communication controller
    1.
    发明授权
    Very high speed line adapter for a communication controller 失效
    用于通信控制器的非常高速的线路适配器

    公开(公告)号:US4809155A

    公开(公告)日:1989-02-28

    申请号:US33388

    申请日:1987-04-02

    CPC分类号: G06F13/128 G06F13/124

    摘要: The high speed line adapter comprises a bit handling layer (34,46) and a byte handling layer (36,50) and a receive queue mechanism (48).The bit layer receives the frames from the high speed line 9. It performs the SDLC protocol, it removes the flag and BCC characters and adds one ending condition control character which indicates whether the frame was correctly received or not. It causes the address and control fields, the data if any and the ending condition character to be stored into a receive queue buffer at the first free address. The byte layer 50 takes out the frame characters from the receive queue as soon as a pool buffer is available in the memory of the central unit of the communication controller. It sends the data if any to said memory through a direct access memory bus and sends the address and control fields and the ending condition to the microprocessor of the adapter.The provision of the receive queue mechanism allows high speed lines to be connected to a communication controller, without modifying its network control program.

    Device for reporting error conditions occurring in adapters, to the data
processing equipment central control unit
    3.
    发明授权
    Device for reporting error conditions occurring in adapters, to the data processing equipment central control unit 失效
    用于报告适配器中出现的错误状况的设备,数据处理设备中央控制单元

    公开(公告)号:US4549296A

    公开(公告)日:1985-10-22

    申请号:US524492

    申请日:1983-08-18

    摘要: In a data processing equipment handling communication lines connected to a central control unit through adapters and a CCU input/output bus, an error reporting device is provided in each adapter for reporting error conditions occurring in the adapter to the central control unit. The adapters are of the type including a microcode controlled microprocessor provided with input and output buses connected to the CCU input/output bus through an interface. The error reporting device in association with dedicated circuits in the interface insures the transmission of the error conditions occurring in the adapter to the central control unit, even when such error conditions affect the integrity of the microcode. When the error reporting device detects an error affecting the microcode integrity, it generates a hard stop signal which causes the operation of the microprocessor under the control of the microcode to be stopped and the error conditions to be transferred to the central control unit making use of the same paths as those used for reporting errors which do not affect the microcode integrity.

    摘要翻译: 在处理通过适配器和CCU输入/输出总线连接到中央控制单元的通信线路的数据处理设备中,在每个适配器中提供错误报告装置,用于向中央控制单元报告适配器中出现的错误状况。 适配器的类型包括一个微代码控制微处理器,提供了通过接口连接到CCU输入/输出总线的输入和输出总线。 与接口中的专用电路相关联的错误报告装置确保将适配器中出现的错误状况传送到中央控制单元,即使这种错误状况影响微代码的完整性。 当错误报告装置检测到影响微代码完整性的错误时,它产生硬停止信号,该信号使得微代码控制下的微处理器的操作停止,并将错误状况传送到中央控制单元,利用 与用于报告不影响微代码完整性的错误相同的路径。

    System for selecting interfaces on a priority basis
    4.
    发明授权
    System for selecting interfaces on a priority basis 失效
    优先选择接口的系统

    公开(公告)号:US4485436A

    公开(公告)日:1984-11-27

    申请号:US295182

    申请日:1981-08-21

    CPC分类号: G06F13/374

    摘要: Adapter interfaces (ADAPT) and line driver interfaces (RDVP and RDVC) are divided into subgroups within a pyramid type of architecture. Each subgroup is provided with independent preselection means for determining the path through the pyramid from the CCU BUS to the adapter to be serviced first.

    摘要翻译: 适配器接口(ADAPT)和线路驱动程序接口(RDVP和RDVC)分为金字塔式架构中的子组。 每个子组提供有独立的预选装置,用于确定从CCU总线到首先要维修的适配器的金字塔的路径。