DEVICE AND METHODS FOR PHASE NOISE MEASUREMENT

    公开(公告)号:US20230393184A1

    公开(公告)日:2023-12-07

    申请号:US17952535

    申请日:2022-09-26

    CPC classification number: G01R29/26

    Abstract: A device for measuring phase noise, including a sampler to sample an input signal, an input filter to receive an input from the sampler, a noise generator to generate a noise signal, a combiner to receive input from, respectively, the input filter and the noise generator, the combiner to output an integrated noise output measurement. The input filter may operate in either the time domain or the frequency domain. The noise generate may generate a noise signal based on the sampler output, or may generate a noise estimate value based on the sampler output.

    PHASE LOCK CIRCUIT
    2.
    发明公开
    PHASE LOCK CIRCUIT 审中-公开

    公开(公告)号:US20240223194A1

    公开(公告)日:2024-07-04

    申请号:US18205008

    申请日:2023-06-02

    CPC classification number: H03L7/093 H03L7/07 H03L7/0991

    Abstract: A phase lock system includes a phase detector to detect a phase difference between a reference signal and the output of a controllable oscillator circuit. A loop filter may filter the output of the loop filter and an integrator may integrate the output of the loop filter. The integrator output may be added to the output of the loop filter and may be input to the controllable oscillator circuit and may modify at least one of the phase and frequency of the controlled oscillator output. A loop filter may enable a 40 dB-per-decade roll-off and improve attenuation of reference signal noise and local oscillator noise.

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