Burst error tolerant decoder and related systems, methods, and devices

    公开(公告)号:US11831340B2

    公开(公告)日:2023-11-28

    申请号:US17453119

    申请日:2021-11-01

    Inventor: Peter Graumann

    CPC classification number: H03M13/2906 G06F11/1076 H03M13/17

    Abstract: Disclosed embodiments of the present disclosure relate, generally, to systems, methods, and devices for correction of burst-errors induced during transmission of encoded blocks of information. Some embodiments relate to decoders configured to test candidate corrections on a received block of information and select a candidate correction that best fits the characteristics of burst-errors expected for a type of transmission scheme. Such tested candidate corrections may be selected based on characteristics of burst-errors typically induced for a type of transmission scheme. Some embodiments relate to decoders configured to test candidate corrections for correcting burst-errors and perform standard error correcting techniques such as Reed-Solomon forward error correction techniques. Some embodiments relate to systems, such as serial/deserializer interfaces, that incorporate such decoders.

    DETERMINING BERLEKAMP DISCREPANCY VALUES
    3.
    发明公开

    公开(公告)号:US20240322843A1

    公开(公告)日:2024-09-26

    申请号:US18611441

    申请日:2024-03-20

    CPC classification number: H03M13/153 G06F17/16 H03M13/1515

    Abstract: A method may include generating a first computational circuit of a current iteration of a Berlekamp algorithm, the first computational circuit to determine a Berlekamp discrepancy value at least partially based on a current Error-Locator Polynomial (ELP) and observed syndromes; and generating a second computational circuit of the current iteration of the Berlekamp algorithm, the second computational circuit to determine an intermediate value, the intermediate value useable by one or more first computational circuits of one or more subsequent iterations of the Berlekamp algorithm to determine Berlekamp discrepancy values.

    REDUCED STATE MLSE DECODING
    4.
    发明申请

    公开(公告)号:US20250055735A1

    公开(公告)日:2025-02-13

    申请号:US18799740

    申请日:2024-08-09

    Inventor: Peter Graumann

    Abstract: A method may include: initializing four states of a trellis, the four states corresponding to the four possible symbol levels in PAM4, where a respective initial state starts with an initial score and an empty survivor path; for respective possible transitions between the four initial states and four possible current states of the trellis, determining expected PAM4 symbols; determining error associated with respective transitions based on differences between a received PAM4 symbol and the expected PAM4 symbols; discarding transitions where the error indicates a difference greater than a single signal level, and keep the other transitions; and for respective current state groups of a two state trellis, determining one of the incoming transitions that was not discarded having the highest likelihood of being associated with a transmitted symbol.

    Burst error tolerant decoder and related systems, methods, and devices

    公开(公告)号:US11165443B2

    公开(公告)日:2021-11-02

    申请号:US16283634

    申请日:2019-02-22

    Inventor: Peter Graumann

    Abstract: Disclosed embodiments of the present disclosure relate, generally, to systems, methods, and devices for correction of burst-errors induced during transmission of encoded blocks of information. Some embodiments relate to decoders configured to test candidate corrections on a received block of information and select a candidate correction that best fits the characteristics of burst-errors expected for a type of transmission scheme. Such tested candidate corrections may be selected based on characteristics of burst-errors typically induced for a type of transmission scheme. Some embodiments relate to decoders configured to test candidate corrections for correcting burst-errors and perform standard error correcting techniques such as Reed-Solomon forward error correction techniques. Some embodiments relate to systems, such as serial/deserializer interfaces, that incorporate such decoders.

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