公开(公告)号：US20240295975A1

公开(公告)日：2024-09-05

申请号：US18604203

申请日：2024-03-13

Applicant: Micron Technology, Inc.

Inventor： Jingwei Cheng ,  Cheng Zhang

IPC: G06F3/06 ,  G06F13/16 ,  G11C7/10

CPC classification number: G06F3/0629 ,  G06F3/0679 ,  G06F13/1668 ,  G11C7/10

Abstract: Methods, systems, and devices for configurable memory die capacitance are described. A memory device may include a capacitive component, which may include one or more capacitors and associated switching components. The capacitive component may be coupled with an input/output (I/O) pad and an associated input buffer, and the one or more capacitors of the capacitive component may be selectively couplable with the I/O pad via the switching components. Switching components may be activated individually, in coordination, or not at all, such that one, multiple, or none of the capacitors may be coupled with the I/O pad. The capacitive component, I/O pad, and input buffer may be included in a same die of the memory device. In some cases, a configuration of the capacitive component may be based on signaling received from a host device.

公开(公告)号：US11947813B2

公开(公告)日：2024-04-02

申请号：US16976286

申请日：2019-08-29

Applicant: Micron Technology, Inc.

Inventor： Jingwei Cheng ,  Cheng Zhang

IPC: G06F3/06 ,  G06F13/16 ,  G11C7/10

CPC classification number: G06F3/0629 ,  G06F3/0679 ,  G06F13/1668 ,  G11C7/10

Abstract: Methods, systems, and devices for configurable memory die capacitance are described. A memory device may include a capacitive component, which may include one or more capacitors and associated switching components. The capacitive component may be coupled with an input/output (I/O) pad and an associated input buffer, and the one or more capacitors of the capacitive component may be selectively couplable with the I/O pad via the switching components. Switching components may be activated individually, in coordination, or not at all, such that one, multiple, or none of the capacitors may be coupled with the I/O pad. The capacitive component, I/O pad, and input buffer may be included in a same die of the memory device. In some cases, a configuration of the capacitive component may be based on signaling received from a host device.

公开(公告)号：US20230118874A1

公开(公告)日：2023-04-20

申请号：US16976286

申请日：2019-08-29

Applicant: Micron Technology, Inc.

Inventor： Jingwei Cheng ,  Cheng Zhang

IPC: G06F3/06

Abstract: Methods, systems, and devices for configurable memory die capacitance are described. A memory device may include a capacitive component, which may include one or more capacitors and associated switching components. The capacitive component may be coupled with an input/output (I/O) pad and an associated input buffer, and the one or more capacitors of the capacitive component may be selectively couplable with the I/O pad via the switching components. Switching components may be activated individually, in coordination, or not at all, such that one, multiple, or none of the capacitors may be coupled with the I/O pad. The capacitive component, I/O pad, and input buffer may be included in a same die of the memory device. In some cases, a configuration of the capacitive component may be based on signaling received from a host device.