公开(公告)号：US20250118385A1

公开(公告)日：2025-04-10

申请号：US18923244

申请日：2024-10-22

Applicant: Micron Technology, Inc.

Inventor： Chunqiang Weng ,  Jingwei Cheng

IPC: G11C29/56

Abstract: Methods, systems, and devices for testing circuit for a memory device are described. An apparatus may include a memory system including contacts that route signals to different regions of the memory system. The apparatus may include a first substrate including a memory system interface coupled with the memory system and a probe interface. The apparatus may also include a second substrate coupled with a host system interface of the first substrate and receive the signal of the memory system from the memory system interface. The first interface may route a signal of the memory system to the probe interface and a tester to determine the signal's integrity and any errors associated with the memory system. The first substrate may include a resistor coupled with the contacts of the memory system, the resistor on a surface of the interface may be configured to improve the signal at the tester.

公开(公告)号：US12142332B2

公开(公告)日：2024-11-12

申请号：US17939491

申请日：2022-09-07

Applicant: Micron Technology, Inc.

Inventor： Chunqiang Weng ,  Jingwei Cheng

IPC: G11C29/12

Abstract: Methods, systems, and devices for testing circuit for a memory device are described. An apparatus may include a memory system including contacts that route signals to different regions of the memory system. The apparatus may include a first substrate including a memory system interface coupled with the memory system and a probe interface. The apparatus may also include a second substrate coupled with a host system interface of the first substrate and receive the signal of the memory system from the memory system interface. The first interface may route a signal of the memory system to the probe interface and a tester to determine the signal's integrity and any errors associated with the memory system. The first substrate may include a resistor coupled with the contacts of the memory system, the resistor on a surface of the interface may be configured to improve the signal at the tester.

公开(公告)号：US20230077784A1

公开(公告)日：2023-03-16

申请号：US17939491

申请日：2022-09-07

Applicant: Micron Technology, Inc.

Inventor： Chunqiang Weng ,  Jingwei Cheng

IPC: G11C29/12

Abstract: Methods, systems, and devices for testing circuit for a memory device are described. An apparatus may include a memory system including contacts that route signals to different regions of the memory system. The apparatus may include a first substrate including a memory system interface coupled with the memory system and a probe interface. The apparatus may also include a second substrate coupled with a host system interface of the first substrate and receive the signal of the memory system from the memory system interface. The first interface may route a signal of the memory system to the probe interface and a tester to determine the signal's integrity and any errors associated with the memory system. The first substrate may include a resistor coupled with the contacts of the memory system, the resistor on a surface of the interface may be configured to improve the signal at the tester.