公开(公告)号：US20250131973A1

公开(公告)日：2025-04-24

申请号：US18790365

申请日：2024-07-31

Applicant: Micron Technology, Inc.

Inventor： Yang Lu ,  Mark Kalei Hadrick ,  Kang-Yong Kim ,  Donald Morgan ,  Victor Wong

IPC: G11C29/44 ,  G11C29/30 ,  G11C29/36

Abstract: Apparatuses and techniques for logging a memory address associated with faulty usage-based disturbance data are described. In an example aspect, a memory device can detect, at a local-bank level, a fault associated with usage-based disturbance data. This detection enables the memory device to log a row address associated with the faulty usage-based disturbance data. To avoid increasing a complexity and/or a size of the memory device, some implementations of the memory device can perform the address logging at the multi-bank level with the assistance of an engine, such as a test engine. The memory device stores the logged address in at least one mode register to communicate the fault to a memory controller. With the logged address, the memory controller can initiate a repair procedure to fix the faulty usage-based disturbance data.

公开(公告)号：US20250046359A1

公开(公告)日：2025-02-06

申请号：US18742634

申请日：2024-06-13

Applicant: Micron Technology, Inc.

Inventor： Yang Lu ,  Mark Kalei Hadrick ,  Donald Morgan

IPC: G11C11/406 ,  G11C11/4076 ,  G11C11/4096

Abstract: Apparatuses and techniques for controlling usage-based disturbance mitigation are described. In an example aspect, usage-based disturbance mitigation is performed between activation and precharging of a row. More specifically, usage-based disturbance circuitry performs an array counter update procedure while the row is active. The techniques for controlling usage-based disturbance mitigation control timing of the array counter update procedure at a multi-bank level or a local-bank level. Additionally, the techniques for controlling usage-based disturbance mitigation control a timing of a precharging operation to ensure completion of the array counter update procedure. The techniques for controlling usage-based disturbance mitigation are not limited to the array counter update procedure and can generally be applied to other aspects of usage-based disturbance mitigation, such as bit-error detection and/or correction.

公开(公告)号：US20250130877A1

公开(公告)日：2025-04-24

申请号：US18790795

申请日：2024-07-31

Applicant: Micron Technology, Inc.

Inventor： Yang Lu ,  Mark Kalei Hadrick ,  Kang-Yong Kim ,  Donald Morgan ,  Victor Wong

IPC: G06F11/07

Abstract: Apparatuses and techniques for handling faulty usage-based-disturbance data are described. In an example aspect, a memory device uses a report flag to indicate that an address of a row that corresponds to the faulty usage-based-disturbance data is logged at a global-bank level and is accessible by a host device. The report flag also enables the memory device to avoid reporting another error until the host device has cleared information associated with a previously-reported error. In another example aspect, the memory device temporarily prevents usage-based-disturbance mitigation from being performed based on the faulty usage-based-disturbance data. This means that if the faulty usage-based-disturbance data would otherwise trigger refreshing of one or more rows that are proximate to the row corresponding to the faulty usage-based-disturbance data, the memory device does not perform these refresh operations. This is beneficial by conserving resources for refreshing victim rows that are identified based on valid usage-based-disturbance data.

公开(公告)号：US20250094262A1

公开(公告)日：2025-03-20

申请号：US18787655

申请日：2024-07-29

Applicant: Micron Technology, Inc.

Inventor： Yang Lu ,  Victor Wong ,  Donald Morgan

IPC: G06F11/07

Abstract: Apparatuses and techniques for implementing usage-based-disturbance alert signaling are described. The technology allows usage-based-disturbance (UBD) alerts to be externally communicated from a memory device without a dedicated external interface. Rather, UBD alerts are combined with memory error/alert signals and communicated on a shared alert-related interface. UBD tracking occurs at the memory bank level, with corresponding independent UBD alert signals. These signals are efficiently combined to generate an overall UBD alert. A temporary backoff signal is generated when an overall UBD alert is sent. The backoff signal ensures requisite external timing parameters are met while allowing the individual memory banks to generate persistent UBD alerts.