公开(公告)号：US20240260251A1

公开(公告)日：2024-08-01

申请号：US18419808

申请日：2024-01-23

Applicant: Micron Technology, Inc.

Inventor： Dong Wan Kim ,  Russell A. Benson ,  Byung Yoon Kim

IPC: H10B12/00

CPC classification number: H10B12/053 ,  H10B12/315 ,  H10B12/34

Abstract: A method used in forming memory circuitry comprises forming transistors individually comprising one source/drain region and another source/drain region. A channel region is between the one and the another source/drain regions. A conductive gate is operatively proximate the channel region. The conductive gate comprises part of one of a plurality of conductive-gate lines in a substrate. Lines of conductive material are formed directly above and directly against individual of the one and another source/drain regions. Individual of the lines of the conductive material are between immediately-laterally-adjacent of the conductive-gate lines. The lines of the conductive material directly above the another source/drain regions are etched through to form islands of the conductive material that are individually directly above and directly against the individual one source/drain regions. Storage elements are formed that are individually electrically coupled to individual of the one source/drain regions through individual of the islands of the conductive material. Other embodiments, including structure, are disclosed.