公开(公告)号：US20220180909A1

公开(公告)日：2022-06-09

申请号：US17114321

申请日：2020-12-07

Applicant: Micron Technology, Inc.

Inventor： Fei Xu ,  Dong Pan ,  Wei Lu Chu

IPC: G11C7/14 ,  G11C7/10 ,  G11C16/30 ,  G11C16/34

Abstract: Methods, systems, and devices for limiting regulator overshoot during power up are described. In some examples, a memory device may generate a first voltage at a first input node of an amplifier of a memory device based on an application, by an external supply, of a second voltage to a terminal of the memory device. The memory device may generate a third voltage at a second node of the amplifier at an amplifier at an offset to the first voltage, where the second node is coupled with a first gate of a first cascode transistor and a second gate of a second cascode transistor. The memory device may activate the amplifier based on generating the third voltage at the second node of the amplifier.