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公开(公告)号:US11579979B2
公开(公告)日:2023-02-14
申请号:US17382889
申请日:2021-07-22
Applicant: Micron Technology, Inc.
Inventor: James E. Dunn , Nathan A. Eckel
IPC: G06F11/14 , G11C14/00 , G11C11/4072 , G06F13/42 , G11C5/14 , G11C7/20 , G11C11/406
Abstract: Devices and techniques for a storage backed memory package save trigger are disclosed herein. Data can be received via a first interface. The data is stored in a volatile portion of the memory package. Here, the memory package includes a second interface arranged to connect a host to a controller in the memory package. A reset signal can be received at the memory package via the first interface. The data stored in the volatile portion of the memory package can be saved to a non-volatile portion of the memory package in response to the reset signal.
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公开(公告)号:US11074131B2
公开(公告)日:2021-07-27
申请号:US16847008
申请日:2020-04-13
Applicant: Micron Technology, Inc.
Inventor: James E. Dunn , Nathan A. Eckel
IPC: G06F11/14 , G06F13/42 , G11C14/00 , G11C5/14 , G11C7/20 , G11C11/4072 , G11C11/406
Abstract: Devices and techniques for a storage backed memory package save trigger are disclosed herein. Data can be received via a first interface. The data is stored in a volatile portion of the memory package. Here, the memory package includes a second interface arranged to connect a host to a controller in the memory package. A reset signal can be received at the memory package via the first interface. The data stored in the volatile portion of the memory package can be saved to a non-volatile portion of the memory package in response to the reset signal.
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公开(公告)号:US20190243713A1
公开(公告)日:2019-08-08
申请号:US16107259
申请日:2018-08-21
Applicant: Micron Technology, Inc.
Inventor: James E. Dunn , Nathan A. Eckel
CPC classification number: G06F11/1441 , G06F11/1456 , G06F13/4282 , G11C5/148 , G11C14/0018
Abstract: Devices and techniques for a storage backed memory package save trigger are disclosed herein. Data can be received via a first interface. The data is stored in a volatile portion of the memory package. Here, the memory package includes a second interface arranged to connect a host to a controller in the memory package. A reset signal can be received at the memory package via the first interface. The data stored in the volatile portion of the memory package can be saved to a non-volatile portion of the memory package in response to the reset signal.
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公开(公告)号:US20210349783A1
公开(公告)日:2021-11-11
申请号:US17382889
申请日:2021-07-22
Applicant: Micron Technology, Inc.
Inventor: James E. Dunn , Nathan A. Eckel
IPC: G06F11/14 , G11C14/00 , G06F13/42 , G11C5/14 , G11C7/20 , G11C11/4072 , G11C11/406
Abstract: Devices and techniques for a storage backed memory package save trigger are disclosed herein. Data can be received via a first interface. The data is stored in a volatile portion of the memory package. Here, the memory package includes a second interface arranged to connect a host to a controller in the memory package. A reset signal can be received at the memory package via the first interface. The data stored in the volatile portion of the memory package can be saved to a non-volatile portion of the memory package in response to the reset signal.
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公开(公告)号:US20200241963A1
公开(公告)日:2020-07-30
申请号:US16847008
申请日:2020-04-13
Applicant: Micron Technology, Inc.
Inventor: James E. Dunn , Nathan A. Eckel
IPC: G06F11/14 , G11C5/14 , G11C11/406 , G11C11/4072 , G11C7/20 , G06F13/42 , G11C14/00
Abstract: Devices and techniques for a storage backed memory package save trigger are disclosed herein. Data can be received via a first interface. The data is stored in a volatile portion of the memory package. Here, the memory package includes a second interface arranged to connect a host to a controller in the memory package. A reset signal can be received at the memory package via the first interface. The data stored in the volatile portion of the memory package can be saved to a non-volatile portion of the memory package in response to the reset signal.
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