公开(公告)号：US20230320091A1

公开(公告)日：2023-10-05

申请号：US17713913

申请日：2022-04-05

Applicant: Micron Technology, Inc.

Inventor： Collin Howder ,  Jeffrey Ehorn ,  John D. Hopkins

IPC: H01L27/11582 ,  H01L27/11556

CPC classification number: H01L27/11582 ,  H01L27/11556

Abstract: A memory array comprising strings of memory cells comprises laterally-spaced memory-blocks individually comprising a vertical stack comprising alternating insulative tiers and conductive tiers directly above conductor material of a conductor tier. Channel-material-string constructions extend through the insulative and conductive tiers to a lowest of the conductive tiers. The channel-material-string constructions individually comprise a charge-blocking-material string, a storage-material string laterally-inward of the charge-blocking-material string, a charge-passage-material string laterally-inward of the storage-material string, and a channel-material string laterally-inward of the charge-passage-material string. A lowest surface of the charge-blocking-material string that is above a lowest surface of the lowest conductive tier is below a lowest surface of a lowest of the insulative tiers that is immediately-above the lowest conductive tier. Conductive material in the lowest conductive tier directly electrically couples together the channel material of individual of the channel-material strings and the conductor material of the conductor tier. Structure independent of method is disclosed.