公开(公告)号：US11031405B2

公开(公告)日：2021-06-08

申请号：US15802016

申请日：2017-11-02

Applicant: Micron Technology, Inc.

Inventor： Mansour Fardad ,  Harish N. Venkata ,  Jeffrey Koelling

IPC: H01L27/108 ,  G11C11/4091 ,  G11C11/408 ,  G11C11/4072 ,  G11C29/12 ,  G11C11/406 ,  G11C29/00 ,  G11C11/4097 ,  G11C5/02

Abstract: Various embodiments comprise methods and related apparatuses formed from those methods for placing at least portions of peripheral circuits under a DRAM memory array, where the peripheral circuits are used to control an operation of the DRAM memory array. In an embodiment, a memory apparatus includes a DRAM memory array and at least one peripheral circuit formed under the DRAM memory array, where the at least one peripheral circuit includes at least one circuit type selected from sense amplifiers and sub-word line drivers. Additional apparatuses and methods are also disclosed.

公开(公告)号：US20190131308A1

公开(公告)日：2019-05-02

申请号：US15802016

申请日：2017-11-02

Applicant: Micron Technology, Inc.

Inventor： Mansour Fardad ,  Harish N. Venkata ,  Jeffrey Koelling

IPC: H01L27/108 ,  G11C11/4091 ,  G11C11/408 ,  G11C11/406 ,  G11C11/4072 ,  G11C29/12

Abstract: Various embodiments comprise methods and related apparatuses formed from those methods for placing at least portions of peripheral circuits under a DRAM memory array, where the peripheral circuits are used to control an operation of the DRAM memory array. In an embodiment, a memory apparatus includes a DRAM memory array and at least one peripheral circuit formed under the DRAM memory array, where the at least one peripheral circuit includes at least one circuit type selected from sense amplifiers and sub-word line drivers. Additional apparatuses and methods are also disclosed.