公开(公告)号：US20250103412A1

公开(公告)日：2025-03-27

申请号：US18786301

申请日：2024-07-26

Applicant: Micron Technology, Inc.

Inventor： Yu-Chung LIEN ,  Ching-Huang LU ,  Zhenming ZHOU ,  Jun WAN

IPC: G06F11/00

Abstract: In some implementations, a memory device may receive a program command instructing the memory device to program host data to a word line associated with a memory. The memory device may determine a program erase cycle (PEC) count associated with the word line. The memory device may determine, based on the PEC count, a selected program scheme to be used to program the host data to the word line, wherein the selected program scheme is one of a single-fine program scheme or a multi-fine program scheme. The memory device may execute the program command by performing the selected program scheme.

公开(公告)号：US20240069788A1

公开(公告)日：2024-02-29

申请号：US17823625

申请日：2022-08-31

Applicant: Micron Technology, Inc.

Inventor： Dung Viet NGUYEN ,  Shantilal Rayshi DORU ,  Jun WAN ,  Sampath RATNAM

IPC: G06F3/06

CPC classification number: G06F3/0655 ,  G06F3/0604 ,  G06F3/0679

Abstract: In some implementations, a controller of a memory device may obtain a first metric associated with a memory of the memory device using a first memory read configuration. The controller may apply a function to the first metric to obtain a second memory read configuration. The controller may obtain a second metric associated with the memory using the second memory read configuration. The controller may filter the first metric and the second metric to obtain a first filtered metric and a second filtered metric. The controller may provide the first filtered metric and the second filtered metric to a memory management process executing on the controller. The controller may perform an action based on an output of the memory management process, wherein the output is based on the first filtered metric and the second filtered metric.