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公开(公告)号:US20240330009A1
公开(公告)日:2024-10-03
申请号:US18738523
申请日:2024-06-10
Applicant: Micron Technology, Inc.
Inventor: Sourin SARKAR , Vamshikrishna KOMURAVELLI , Kanika MITTAL
IPC: G06F9/4401
CPC classification number: G06F9/4411 , G06F9/4418
Abstract: Implementations described herein relate to boot processes for memory devices. In some implementations, a controller of a storage system receives a command for enabling a fast bootup process for the storage system. The fast bootup process may exclude a measurement of information retrieved from a memory device of the storage system during the fast bootup process. The controller may enable the fast bootup process based on the command. The controller may disable a normal bootup process for the storage system based on the fast bootup process being enabled. The normal bootup process may include a measurement of information retrieved from the memory device during the normal bootup process.
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公开(公告)号:US20230300139A1
公开(公告)日:2023-09-21
申请号:US17697620
申请日:2022-03-17
Applicant: Micron Technology, Inc.
Inventor: Sourin SARKAR , Kanika MITTAL , Gowrishankar GAJENDIRAN
CPC classification number: H04L63/102 , H04L9/006 , H04L63/08 , H04L67/12 , H04L2209/84
Abstract: In some implementations, a device of an Internet of Things (IoT) network may receive, from a host associated with the IoT network, information associated with the IoT network. The device may store, via a memory controller of the device, the information in a memory with an embedded hardware security module of the device, wherein the device serves as a root of trust for the host using the information stored in the memory. The device may receive, from the host, a request to perform a security function. The device may perform, based on the request, the security function using the information stored in the memory. The device may generate an alert based on an outcome of the security function. Numerous other implementations are described.
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公开(公告)号:US20230359466A1
公开(公告)日:2023-11-09
申请号:US17661983
申请日:2022-05-04
Applicant: Micron Technology, Inc.
Inventor: Sourin SARKAR , Vamshikrishna KOMURAVELLI , Kanika MITTAL
IPC: G06F9/4401
CPC classification number: G06F9/4411 , G06F9/4418
Abstract: Implementations described herein relate to boot processes for memory devices. In some implementations, a controller of a storage system receives a command for enabling a fast bootup process for the storage system. The fast bootup process may exclude a measurement of information retrieved from a memory device of the storage system during the fast bootup process. The controller may enable the fast bootup process based on the command. The controller may disable a normal bootup process for the storage system based on the fast bootup process being enabled. The normal bootup process may include a measurement of information retrieved from the memory device during the normal bootup process.
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