公开(公告)号：US20230074643A1

公开(公告)日：2023-03-09

申请号：US17889660

申请日：2022-08-17

Applicant: Micron Technology, Inc.

Inventor： Kondalarao Chunchu ,  Niraimathi N S ,  Sharath Chandra Ambula ,  Shobhit Kumar Bhadani ,  Sushil Kumar ,  Vanaja Ambapuram ,  Venkata Kiran Kumar Matturi

IPC: G06F3/06

Abstract: Methods, systems, and devices for rate adjustments for a memory interface are described. A host system may communicate with a memory system via an interface according to multiple data transfer rates. For example, the host system may configure the interface to operate according to a first rate. The host system may switch the interface from the first rate to a second rate in response to one or more commands from the host system satisfying one or more parameters such as a threshold quantity of data associated with a command, a threshold quantity of issued commands associated with at least the threshold quantity of data, a threshold quantity of issued and unexecuted commands, or any combination thereof. Based on the switching, the host system may communicate with the memory system via the interface in accordance with the second rate.