公开(公告)号：US20230367680A1

公开(公告)日：2023-11-16

申请号：US18143937

申请日：2023-05-05

Applicant: Micron Technology, Inc.

Inventor： Lu Tong ,  Ashish Ghai ,  Chai Chuan Yao ,  Ekamdeep Singh ,  Lakshmi Kalpana Vakati ,  Sheng Huang Lee ,  Matthew Ivan Warren ,  Dheeraj Srinivasan ,  Jeffrey Ming-Hung Tsai

IPC: G06F11/20 ,  G06F3/06

CPC classification number: G06F11/2023 ,  G06F3/0617 ,  G06F3/064 ,  G06F3/0673 ,  G06F2201/805

Abstract: Control logic in a memory device executes a programming operation to program the set of memory blocks of the set of memory planes to a set of a programming levels. In response to determining at least a portion of a first memory block passed a program verify operation associated with a last programming level of the set of programming levels, the control logic executes a first program sub-operation to terminate the programming operation with respect to a first subset of one or more memory planes of the set of memory planes that passed the program verify operation associated with the last programming level and identify a second subset of one or more memory planes that failed the program verify operation associated with the last programming level. The control logic executes a second program sub-operation to apply a trim set to the second subset of one or more memory planes that failed the program verify operation of the last programming level.

公开(公告)号：US20250110841A1

公开(公告)日：2025-04-03

申请号：US18980708

申请日：2024-12-13

Applicant: Micron Technology, Inc.

Inventor： Lu Tong ,  Ashish Ghai ,  Chai Chuan Yao ,  Ekamdeep Singh ,  Lakshmi Kalpana Vakati ,  Sheng Huang Lee ,  Matthew Ivan Warren ,  Dheeraj Srinivasan ,  Jeffrey Ming-Hung Tsai

IPC: G06F11/20 ,  G06F3/06

Abstract: Control logic in a memory device executes a programming operation to program the set of memory blocks of the set of memory planes to a set of a programming levels. The control logic identify a subset of memory blocks of one or more memory planes that pass a program count operation associated with a last programming level of the set of programming levels. The control logic further terminates execution of the programming operation on the one or more memory planes associated with the subset of memory blocks.

公开(公告)号：US12204422B2

公开(公告)日：2025-01-21

申请号：US18143937

申请日：2023-05-05

Applicant: Micron Technology, Inc.

Inventor： Lu Tong ,  Ashish Ghai ,  Chai Chuan Yao ,  Ekamdeep Singh ,  Lakshmi Kalpana Vakati ,  Sheng Huang Lee ,  Matthew Ivan Warren ,  Dheeraj Srinivasan ,  Jeffrey Ming-Hung Tsai

IPC: G06F11/20 ,  G06F3/06

Abstract: Control logic in a memory device executes a programming operation to program the set of memory blocks of the set of memory planes to a set of a programming levels. In response to determining at least a portion of a first memory block passed a program verify operation associated with a last programming level of the set of programming levels, the control logic executes a first program sub-operation to terminate the programming operation with respect to a first subset of one or more memory planes of the set of memory planes that passed the program verify operation associated with the last programming level and identify a second subset of one or more memory planes that failed the program verify operation associated with the last programming level. The control logic executes a second program sub-operation to apply a trim set to the second subset of one or more memory planes that failed the program verify operation of the last programming level.