公开(公告)号：US11189623B2

公开(公告)日：2021-11-30

申请号：US16223506

申请日：2018-12-18

Applicant: Micron Technology, Inc.

Inventor： Oscar O. Enomoto ,  Chin Chuan Liu ,  Chia Wei Tsai ,  Yu Jen Lin

IPC: H01L27/108

Abstract: A method of forming an apparatus comprises forming filled trenches within a semiconductive structure having a well region comprising one or more dopants, the filled trenches extending into the well region and each individually comprising a conductive gate structure and a dielectric liner intervening between the conductive gate structure and the semiconductive structure. A fluorine-doped region is formed at junctions between the well region and additional regions of the semiconductive structure overlying the well region. The additional regions of the semiconductive structure are doped with one or more additional dopants having a different conductivity type than that of the one or more dopants of the well region after forming the fluorine-doped region. The semiconductive structure is annealed after doping the additional regions thereof. Apparatuses, memory devices, and electronic systems also described.

公开(公告)号：US10833087B2

公开(公告)日：2020-11-10

申请号：US16107324

申请日：2018-08-21

Applicant: Micron Technology, Inc.

Inventor： Fredrick D. Fishburn ,  Haitao Liu ,  Soichi Sugiura ,  Oscar O. Enomoto ,  Mark A. Zaleski ,  Keisuke Hirofuji ,  Makoto Morino ,  Ichiro Abe ,  Yoshiyuki Nanjo ,  Atsuko Otsuka

IPC: H01L27/00 ,  H01L27/108 ,  H01L29/423 ,  H01L29/66

Abstract: A semiconductor device comprises a memory storage component and a transistor in operable communication with the memory storage element. The transistor comprises a source region, a drain region, a gate electrode between the source region and the drain region, a charge trapping material surrounding at least an upper portion of the gate electrode, and an oxide material on sides of the charge trapping material. Related systems and methods are also disclosed.

公开(公告)号：US20200066726A1

公开(公告)日：2020-02-27

申请号：US16107324

申请日：2018-08-21

Applicant: Micron Technology, Inc.

Inventor： Fredrick D. Fishburn ,  Haitao Liu ,  Soichi Sugiura ,  Oscar O. Enomoto ,  Mark A. Zaleski ,  Keisuke Hirofuji ,  Makoto Morino ,  Ichiro Abe ,  Yoshiyuki Nanjo ,  Atsuko Otsuka

IPC: H01L27/108 ,  H01L29/423 ,  H01L29/66

Abstract: A semiconductor device comprises a memory storage component and a transistor in operable communication with the memory storage element. The transistor comprises a source region, a drain region, a gate electrode between the source region and the drain region, a charge trapping material surrounding at least an upper portion of the gate electrode, and an oxide material on sides of the charge trapping material. Related systems and methods are also disclosed.