公开(公告)号：US20240407154A1

公开(公告)日：2024-12-05

申请号：US18677457

申请日：2024-05-29

Applicant: Micron Technology, Inc.

Inventor： Albert Daen Liao ,  Ting Zhao ,  Cheng Li ,  Ruijing Ge ,  Matthew Jacob Jerry ,  David A. Daycock ,  Kolya Yastrebenetsky ,  Kamal M. Karda

IPC: H10B12/00

Abstract: A variety of applications can include an apparatus having a memory device including digit lines isolated from each other by filling an area directly under the digit line with a dielectric material. The dielectric material can be any insulating material such as oxides or nitrides. The provision of the area directly under each digit line can be accomplished without etching out an entire layer of epitaxially grown regions for the memory cells vertically stacked in a three-dimensional array. In a three-dimensional DRAM, metal plates for capacitors can be isolated in a manner similar to the isolation of digit lines. Such processing can be scalable, which may allow for a three-dimensional DRAM to have hundreds memory cell tiers.