公开(公告)号：US20250013258A1

公开(公告)日：2025-01-09

申请号：US18749057

申请日：2024-06-20

Applicant: Micron Technology, Inc.

Inventor： Fabien Funfrock ,  Elena Cabrera Bernal ,  Suhas Shivapakash ,  Jens Polney

IPC: G06F1/08 ,  G06F3/06

Abstract: Methods, systems, and devices for techniques for clock doubling are described. A clock adjustment circuit may receive as inputs two clock signals that each have the same frequency and different phases and may generate a clock signal with a higher frequency than the two clock signal inputs. A duty cycle monitor may monitor and support correction of a shift in the relative phases of the two input clocks to maintain a consistent duty cycle of the generated higher frequency clock signal. The clock adjustment circuit may reduce the length of a clock tree that is traversed by the higher frequency clock, such as to reduce bias temperature instability degradation or other types of signal degradation.