-
公开(公告)号：US20220407505A1
公开(公告)日：2022-12-22
申请号：US17351421
申请日：2021-06-18
Applicant: Micron Technology, Inc.
Inventor： Maksim Kuzmenka , Elena Cabrera Bernal
IPC: H03K5/13 , G11C11/22 , G11C11/4076 , H03F3/45 , H03G3/30
Abstract: Methods, systems, and devices for delay adjustment circuits are described. Amplifiers (e.g., differential amplifiers) may act like variable capacitors (e.g., due to the Miller-effect) to control delays of signals between buffer (e.g., re-driver) stages. The gains of the amplifiers may be adjusted by adjusting the currents through the amplifiers, which may change the apparent capacitances seen by the signal line (due to the Miller-effect). The capacitance of each amplifier may be the intrinsic capacitance of input transistors that make up the amplifier, or may be a discrete capacitor. In some examples, two differential stages may be inserted on a four-phase clocking system (e.g., one on 0 and 180 phases, the other on 90 and 270 phases), and may be controlled differentially to control phase-to-phase delay.
-
公开(公告)号：US20230119349A1
公开(公告)日：2023-04-20
申请号：US18084172
申请日：2022-12-19
Applicant: Micron Technology, Inc.
Inventor： Maksim Kuzmenka , Elena Cabrera Bernal
IPC: H03K5/13 , G11C11/22 , G11C11/4076 , H03G3/30 , H03F3/45
Abstract: Methods, systems, and devices for delay adjustment circuits are described. Amplifiers (e.g., differential amplifiers) may act like variable capacitors (e.g., due to the Miller-effect) to control delays of signals between buffer (e.g., re-driver) stages. The gains of the amplifiers may be adjusted by adjusting the currents through the amplifiers, which may change the apparent capacitances seen by the signal line (due to the Miller-effect). The capacitance of each amplifier may be the intrinsic capacitance of input transistors that make up the amplifier, or may be a discrete capacitor. In some examples, two differential stages may be inserted on a four-phase clocking system (e.g., one on 0 and 180 phases, the other on 90 and 270 phases), and may be controlled differentially to control phase-to-phase delay.
-
公开(公告)号：US11949419B2
公开(公告)日：2024-04-02
申请号：US18084172
申请日：2022-12-19
Applicant: Micron Technology, Inc.
Inventor： Maksim Kuzmenka , Elena Cabrera Bernal
CPC classification number: H03K5/13 , G11C11/2293 , G11C11/4076 , H03F3/45179 , H03G3/30 , G11C11/221 , H03K2005/00019 , H03K2005/00208
Abstract: Methods, systems, and devices for delay adjustment circuits are described. Amplifiers (e.g., differential amplifiers) may act like variable capacitors (e.g., due to the Miller-effect) to control delays of signals between buffer (e.g., re-driver) stages. The gains of the amplifiers may be adjusted by adjusting the currents through the amplifiers, which may change the apparent capacitances seen by the signal line (due to the Miller-effect). The capacitance of each amplifier may be the intrinsic capacitance of input transistors that make up the amplifier, or may be a discrete capacitor. In some examples, two differential stages may be inserted on a four-phase clocking system (e.g., one on 0 and 180 phases, the other on 90 and 270 phases), and may be controlled differentially to control phase-to-phase delay.
-
公开(公告)号：US11262780B1
公开(公告)日：2022-03-01
申请号：US17096225
申请日：2020-11-12
Applicant: Micron Technology, Inc.
Inventor： Martin Brox , Satoru Sugimoto , Elena Cabrera Bernal , Jan Pottgiesser , Sven Piatkowski
Abstract: Methods, systems, and devices for back-bias optimization are described. An apparatus, such as an electronic apparatus, may include a first substrate region and a second substrate region. The apparatus may also include a voltage generator that is disposed on the first substrate region and that includes an output terminal coupled with a conductive path. The apparatus may also include a set of clamp circuits disposed on the second substrate region. The set of clamp circuits may be configured selectively couple the conductive path with a voltage supply.
-
公开(公告)号：US20240053908A1
公开(公告)日：2024-02-15
申请号：US17884278
申请日：2022-08-09
Applicant: Micron Technology, Inc.
Inventor： Martin Brox , Elena Cabrera Bernal , Milena Tsevetkova Ivanov , Manfred Hans Plan , Oleg Sakolski , Filippo Vitale
IPC: G06F3/06
CPC classification number: G06F3/0632 , G06F3/0604 , G06F3/0679
Abstract: Methods, systems, and devices for temperature-dependent refresh operations are described. A memory system may adjust refresh operations based on a temperature of the memory system to reduce a refresh current and improve reliability of the refresh operations. For example, the memory system may include a temperature sensor configured to provide temperature information associated with a memory device. Based on the temperature information, the memory system may, in response to a refresh command, activate a set of access lines (e.g., word lines) to refresh memory cells coupled with the access lines, where a count of the set of access lines (e.g., how many access lines are included in the set) may be based on the temperature information. In some examples, the count of the set may be determined based on comparing the temperature information to one or more temperature thresholds.
-
Patent Agency Ranking
公开(公告)号：US20230006659A1
公开(公告)日：2023-01-05
申请号：US17807318
申请日：2022-06-16
Applicant: Micron Technology, Inc.
Inventor： Maksim Kuzmenka , Elena Cabrera Bernal
Abstract: Apparatuses and methods for correcting a duty-cycle of a clock signal are disclosed. An apparatus includes a duty-cycle adjuster, a circuit, and a clock detector. The duty-cycle adjuster is configured to receive an input clock signal and correct a duty-cycle of a corrected clock signal relative to an input duty-cycle of the input clock signal. The circuit is configured to control corrections made to the duty-cycle of the corrected clock signal by the duty-cycle adjuster. The clock detector is configured to disable the corrections made to the duty-cycle of the corrected clock signal responsive to a detection that the input clock signal is disabled.
-
公开(公告)号：US11368142B1
公开(公告)日：2022-06-21
申请号：US17366655
申请日：2021-07-02
Applicant: Micron Technology, Inc.
Inventor： Maksim Kuzmenka , Elena Cabrera Bernal
Abstract: Apparatuses and methods for correcting a duty-cycle of a clock signal are disclosed. An apparatus includes an integrator circuit, an amplifier circuit, and an electrically controllable switch. The integrator circuit is configured to provide an integrator signal indicating substantially an integral of a corrected clock signal. The amplifier circuit is configured to be disabled responsive to a detection that an input clock signal is disabled. The amplifier circuit includes a first amplifier input terminal and a second amplifier input terminal. The electrically controllable switch is configured to selectively electrically connect the first amplifier input terminal to the second amplifier input terminal responsive to the detection that the input clock signal is disabled. A method of correcting a duty-cycle of an input clock signal includes adjusting a corrected duty-cycle of the corrected clock signal responsive to a first error signal and a second error signal from the amplifier circuit.
-
公开(公告)号：US20250013258A1
公开(公告)日：2025-01-09
申请号：US18749057
申请日：2024-06-20
Applicant: Micron Technology, Inc.
Inventor： Fabien Funfrock , Elena Cabrera Bernal , Suhas Shivapakash , Jens Polney
Abstract: Methods, systems, and devices for techniques for clock doubling are described. A clock adjustment circuit may receive as inputs two clock signals that each have the same frequency and different phases and may generate a clock signal with a higher frequency than the two clock signal inputs. A duty cycle monitor may monitor and support correction of a shift in the relative phases of the two input clocks to maintain a consistent duty cycle of the generated higher frequency clock signal. The clock adjustment circuit may reduce the length of a clock tree that is traversed by the higher frequency clock, such as to reduce bias temperature instability degradation or other types of signal degradation.
-
公开(公告)号：US20240240995A1
公开(公告)日：2024-07-18
申请号：US18404610
申请日：2024-01-04
Applicant: Micron Technology, Inc.
Inventor： Luiza Souza Correa , Julius Löckemann , Elena Cabrera Bernal , Martin Brox , Jun Tan
Abstract: Methods, systems, and devices for temperature sensor linearization techniques are described. A temperature sensor associated with a semiconductor device may include a first circuit and a second circuit. The second circuit may be configured to determine that a first temperature, associated with the semiconductor device and indicated by one or more first bits generated by the first circuit, is within a first temperature range of a total temperature range measurable by the temperature sensor. The second circuit may be configured to generate and output, based on the first temperature being within the first temperature range, one or more second bits indicating a second temperature associated with the semiconductor device. The second circuit may generate the one or more second bits by applying, to the one or more first bits, a first-order operation corresponding to the first temperature range and associated with correcting an error of the first temperature.
-
公开(公告)号：US11791805B2
公开(公告)日：2023-10-17
申请号：US17807318
申请日：2022-06-16
Applicant: Micron Technology, Inc.
Inventor： Maksim Kuzmenka , Elena Cabrera Bernal
Abstract: Apparatuses and methods for correcting a duty-cycle of a clock signal are disclosed. An apparatus includes a duty-cycle adjuster, a circuit, and a clock detector. The duty-cycle adjuster is configured to receive an input clock signal and correct a duty-cycle of a corrected clock signal relative to an input duty-cycle of the input clock signal. The circuit is configured to control corrections made to the duty-cycle of the corrected clock signal by the duty-cycle adjuster. The clock detector is configured to disable the corrections made to the duty-cycle of the corrected clock signal responsive to a detection that the input clock signal is disabled.
-
-
-
-
-
-
-
-
-
Search Results
11
records
(took 0.014 seconds)
