公开(公告)号：US20220208609A1

公开(公告)日：2022-06-30

申请号：US17137135

申请日：2020-12-29

Applicant: Micron Technology, Inc.

Inventor： Wei Yeeng Ng ,  Rajesh Balachandran ,  Frank Speetjens ,  Andrew L. Li ,  Sukhdeep Kaur ,  Sangeetha P. Komanduri

IPC: H01L21/78 ,  H01L23/00

Abstract: A method for mitigating crack propagation during manufacture of semiconductor dies, and associated systems and methods are disclosed herein. The method includes forming holes into a first side of a wafer substrate opposite a second side. The wafer substrate has active components at the second side. Each hole extends from the first side towards the second side an extend to an intermediate depth within the wafer substrate such that a bottom of the holes is spaced vertically apart from the active components on the second side. The holes are configured to inhibit cracks in the wafer substrate from propagating longitudinally across the wafer substrate. The method also includes backgrinding the first side of the wafer substrate to thin the wafer substrate after forming the holes. The method also includes dicing the wafer substrate after backgrinding to separate individual semiconductor dies from each other.

公开(公告)号：US20230260840A1

公开(公告)日：2023-08-17

申请号：US18306137

申请日：2023-04-24

Applicant: Micron Technology, Inc.

Inventor： Wei Yeeng Ng ,  Rajesh Balachandran ,  Frank Speetjens ,  Andrew L. Li ,  Sukhdeep Kaur ,  Sangeetha P. Komanduri

IPC: H01L21/78 ,  H01L23/00 ,  H01L23/28

CPC classification number: H01L21/78 ,  H01L23/562 ,  H01L23/28

Abstract: A method for mitigating crack propagation during manufacture of semiconductor dies, and associated systems and methods are disclosed herein. The method includes forming holes into a first side of a wafer substrate opposite a second side. The wafer substrate has active components at the second side. Each hole extends from the first side towards the second side an extend to an intermediate depth within the wafer substrate such that a bottom of the holes is spaced vertically apart from the active components on the second side. The holes are configured to inhibit cracks in the wafer substrate from propagating longitudinally across the wafer substrate. The method also includes backgrinding the first side of the wafer substrate to thin the wafer substrate after forming the holes. The method also includes dicing the wafer substrate after backgrinding to separate individual semiconductor dies from each other.

公开(公告)号：US11637040B2

公开(公告)日：2023-04-25

申请号：US17137135

申请日：2020-12-29

Applicant: Micron Technology, Inc.

Inventor： Wei Yeeng Ng ,  Rajesh Balachandran ,  Frank Speetjens ,  Andrew L. Li ,  Sukhdeep Kaur ,  Sangeetha P. Komanduri

IPC: H01L23/28 ,  H01L21/78 ,  H01L23/00

Abstract: A method for mitigating crack propagation during manufacture of semiconductor dies, and associated systems and methods are disclosed herein. The method includes forming holes into a first side of a wafer substrate opposite a second side. The wafer substrate has active components at the second side. Each hole extends from the first side towards the second side an extend to an intermediate depth within the wafer substrate such that a bottom of the holes is spaced vertically apart from the active components on the second side. The holes are configured to inhibit cracks in the wafer substrate from propagating longitudinally across the wafer substrate. The method also includes backgrinding the first side of the wafer substrate to thin the wafer substrate after forming the holes. The method also includes dicing the wafer substrate after backgrinding to separate individual semiconductor dies from each other.