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    NETWORK TRAFFIC RATE LIMITING IN COMPUTING SYSTEMS
    1.
    发明申请
    NETWORK TRAFFIC RATE LIMITING IN COMPUTING SYSTEMS 审中-公开

    公开(公告)号：US20190081899A1

    公开(公告)日：2019-03-14

    申请号：US15907546

    申请日：2018-02-28

    Applicant: Microsoft Technology Licensing, LLC

    Inventor： Sambhrama Mundkur ,  Fengfen Liu ,  Norman Lam ,  Andrew Putnam ,  Somesh Chaturmohta ,  Daniel Firestone

    IPC: H04L12/801 ,  H04L12/861 ,  H04L12/935 ,  H04L12/911

    Abstract: Distributed computing systems, devices, and associated methods of packet routing are disclosed herein. In one embodiment, a computing device includes a field programmable gate array (“FPGA”) that includes an inbound processing path and outbound processing path in opposite processing directions. The inbound processing path can forward a packet received from the computer network to a buffer on the FPGA instead of the NIC. The outbound processing path includes an outbound multiplexer having a rate limiter circuit that only forwards the received packet from the buffer back to the computer network when a virtual port corresponding to the packet has sufficient transmission allowance. The outbound multiplexer can also periodically increment the transmission allowance based on a target bandwidth for the virtual port.

    Parallel decision tree processor architecture
    2.
    发明授权
    Parallel decision tree processor architecture 有权

    公开(公告)号：US10332008B2

    公开(公告)日：2019-06-25

    申请号：US14216990

    申请日：2014-03-17

    Applicant: Microsoft Technology Licensing, LLC

    Inventor： Douglas C. Burger ,  James R. Larus ,  Andrew Putnam ,  Jan Gray

    IPC: G06N20/20 ,  G06N5/02 ,  G06F16/901 ,  G06F16/903

    Abstract: A decision tree multi-processor system includes a plurality of decision tree processors that access a common feature vector and execute one or more decision trees with respect to the common feature vector. A related method includes providing a common feature vector to a plurality of decision tree processors implemented within an on-chip decision tree scoring system, and executing, by the plurality of decision tree processors, a plurality off decision trees, by reference to the common feature vector. A related decision tree-walking system includes feature storage that stores a common feature vector and a plurality of decision tree processors that access the common feature vector from the feature storage and execute a plurality of decision trees by comparing threshold values of the decision trees to feature values within the common feature vector.

    NETWORK TRAFFIC ROUTING IN DISTRIBUTED COMPUTING SYSTEMS
    7.
    发明申请
    NETWORK TRAFFIC ROUTING IN DISTRIBUTED COMPUTING SYSTEMS 审中-公开

    公开(公告)号：US20190081891A1

    公开(公告)日：2019-03-14

    申请号：US15824914

    申请日：2017-11-28

    Applicant: Microsoft Technology Licensing, LLC

    Inventor： Sambhrama Mundkur ,  Fengfen Liu ,  Norman Lam ,  Andrew Putnam ,  Somesh Chaturmohta ,  Daniel Firestone

    IPC: H04L12/717 ,  H04L12/721 ,  H04L12/707 ,  H04L12/741 ,  H04L12/801

    Abstract: Distributed computing systems, devices, and associated methods of packet routing are disclosed herein. In one embodiment, a method includes receiving, from a computing network, a packet at a packet processor of a server. The method also includes matching the received packet with a flow in a flow table contained in the packet processor and determining whether the action indicates that the received packet is to be forwarded to a NIC buffer in the outbound processing path of the packet processor instead of the NIC. The method further includes in response to determining that the action indicates that the received packet is to be forwarded to the NIC buffer, forwarding the received packet to the NIC buffer and processing the packet in the NIC buffer to forward the packet to the computer network without exposing the packet to the main processor.

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