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公开(公告)号:US11593138B2
公开(公告)日:2023-02-28
申请号:US16808286
申请日:2020-03-03
Applicant: Microsoft Technology Licensing, LLC
Inventor: Derek Chiou , Andrew Putnam , Daniel Firestone , Jack Lavier
Abstract: A physical server with an offload card including a SoC (system-on-chip) and a FPGA (field programmable gate array) is disclosed. According to one set of embodiments, the SoC can be configured to offload one or more hypervisor functions from a CPU complex of the server that are suited for execution in software, and the FPGA can be configured to offload one or more hypervisor functions from the CPU complex that are suited for execution in hardware.
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公开(公告)号:US10860358B2
公开(公告)日:2020-12-08
申请号:US15711624
申请日:2017-09-21
Applicant: Microsoft Technology Licensing, LLC
Inventor: Khoa Anh To , Omar Cardona , Daniel Firestone , Alireza Dabagh
IPC: G06F9/455 , H04L12/851 , H04L12/911 , H04L12/46 , H04L12/869 , H04L12/24 , H04L12/927 , H04L12/813
Abstract: Methods and devices for determining settings for a virtual machine may include partitioning a physical network into a plurality of traffic classes. The methods and devices may include determining at least one virtual enhanced transmission selection (ETS) setting for one or more virtual machines, wherein the virtual ETS setting includes at least one virtual traffic class that corresponds to one of the plurality of traffic classes. The methods and devices may include transmitting a notification to the one or more virtual machines identifying the virtual ETS setting.
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公开(公告)号:US20190089640A1
公开(公告)日:2019-03-21
申请号:US15711733
申请日:2017-09-21
Applicant: Microsoft Technology Licensing, LLC
Inventor: Khoa Anh TO , Omar Cardona , Daniel Firestone , Alireza Dabagh
IPC: H04L12/851 , H04L12/931 , H04L12/24 , H04L12/713
Abstract: Methods and devices for data packet transmission at a host computer device hosting a virtual machine may include receiving, at a virtual administrator component operating on the virtual machine, virtual enhanced transmission selection (ETS) settings information from the host computer device. The methods and devices may include creating at least one priority rule for tagging one or more data packets from an application executing on the virtual machine with a virtual priority value based on the virtual ETS settings information. The methods and devices may include tagging the one or more data packets with the virtual priority value based on the at least one priority rule. The methods and devices may include transmitting the one or more data packets with the virtual priority value to the host computer device.
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公开(公告)号:US11218537B2
公开(公告)日:2022-01-04
申请号:US15930299
申请日:2020-05-12
Applicant: MICROSOFT TECHNOLOGY LICENSING, LLC
Inventor: Rohan Gandhi , Shachar Raindel , Daniel Firestone , Jitendra Padhye , Lihua Yuan
IPC: H04L29/08 , H04L12/741 , G06F15/173 , G06F15/76
Abstract: Techniques for facilitating load balancing in distributed computing systems are disclosed herein. In one embodiment, a method includes receiving, at a destination server, a request packet from a load balancer via the computer network requesting a remote direct memory access (“RDMA”) connection between an originating server and one or more other servers selectable by the load balancer. The method can also include configuring, at the destination server, a rule for processing additional packets transmittable to the originating server via the RDMA connection based on the received reply packet. The rule is configured to encapsulate an outgoing packet transmittable to the originating server with an outer header having a destination field containing a network address of the originating server and a source field containing another network address of the destination server.
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公开(公告)号:US11063857B2
公开(公告)日:2021-07-13
申请号:US16198732
申请日:2018-11-21
Applicant: Microsoft Technology Licensing, LLC
Inventor: Rishabh Tewari , Daniel Firestone , Harish Kumar Chandrappa , Anitha Adusumilli , David Michael Brumley , Deepak Bansal , Albert Gordon Greenberg , Parag Sharma , Arjun Roy
Abstract: Techniques are described herein that are capable of monitoring connectivity and latency of network links in virtual networks. For instance, a ping agent injects first ping packets into network traffic on behalf of hosts in the virtual network. The ping agent monitors incoming packets to identify first ping response packets, which are in response to the first ping packets, among the incoming packets. A ping responder rule that is included in inbound packet filter rules for a port in a virtual switch intercepts second ping packets in the network traffic. The ping responder rule converts the second ping packets into second ping response packets and injects the second ping response packets into outbound packet filter rules to be transferred to sources from which the second ping packets are received.
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公开(公告)号:US10715585B2
公开(公告)日:2020-07-14
申请号:US15639331
申请日:2017-06-30
Applicant: Microsoft Technology Licensing, LLC
Inventor: Daniel Firestone
IPC: G06F9/455 , H04L12/713 , H04L12/717 , H04L12/741 , H04L12/747 , H04L12/851 , H04L12/931 , H04L29/06 , H04L29/08 , H04L29/12
Abstract: Computing systems, devices, and associated methods of operation of processing packets in a distributed computing system are disclosed herein. In one embodiment, a method includes receiving a packet having a header with multiple header fields and a payload and parsing one or more of the multiple header fields of the received packet. The method also includes matching the received packet with an rule object from each of multiple layer objects individually containing multiple rule objects based on the parsed one or more of the multiple header fields. The rule object has one or more conditions matching the one or more parsed header fields of the packet and a corresponding flow action. The method further includes generating a composite action by combining the flow actions individually corresponding to one of the matched rule objects from one of multiple layer objects and applying the generated composite action to the packet.
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公开(公告)号:US20210126966A1
公开(公告)日:2021-04-29
申请号:US15930299
申请日:2020-05-12
Applicant: MICROSOFT TECHNOLOGY LICENSING, LLC
Inventor: Rohan Gandhi , Shachar Raindel , Daniel Firestone , Jitendra Padhye , Lihua Yuan
IPC: H04L29/08 , H04L12/741 , G06F15/173 , G06F15/76
Abstract: Techniques for facilitating load balancing in distributed computing systems are disclosed herein. In one embodiment, a method includes receiving, at a destination server, a request packet from a load balancer via the computer network requesting a remote direct memory access (“RDMA”) connection between an originating server and one or more other servers selectable by the load balancer. The method can also include configuring, at the destination server, a rule for processing additional packets transmittable to the originating server via the RDMA connection based on the received reply packet. The rule is configured to encapsulate an outgoing packet transmittable to the originating server with an outer header having a destination field containing a network address of the originating server and a source field containing another network address of the destination server.
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公开(公告)号:US10437775B2
公开(公告)日:2019-10-08
申请号:US15824925
申请日:2017-11-28
Applicant: Microsoft Technology Licensing, LLC
Inventor: Alec Kochevar-Cureton , Somesh Chaturmohta , Norman Lam , Sambhrama Mundkur , Daniel Firestone
IPC: G06F15/167 , G06F15/173 , H04L29/06 , G06F9/455 , H04L12/801 , H04L12/911 , H04L12/935 , H04L12/861 , H04L12/707 , H04L12/721 , H04L12/717 , H04L12/741 , G06F15/76 , H04L12/813 , H04L12/931 , H04L29/08
Abstract: Distributed computing systems, devices, and associated methods of remote direct memory access (“RDMA”) packet routing are disclosed herein. In one embodiment, a server includes a main processor, a network interface card (“NIC”), and a field programmable gate array (“FPGA”) operatively coupled to the main processor via the NIC. The FPGA includes an inbound processing path having an inbound packet buffer configured to receive an inbound packet from the computer network, a NIC buffer, and a multiplexer between the inbound packet buffer and the NIC, and between the NIC buffer and the NIC. The FPGA also includes an outbound processing path having an outbound action circuit having an input to receive the outbound packet from the NIC, a first output to the computer network, and a second output to the NIC buffer in the inbound processing path.
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公开(公告)号:US10097478B2
公开(公告)日:2018-10-09
申请号:US14601214
申请日:2015-01-20
Applicant: Microsoft Technology Licensing, LLC
Inventor: Khoa To , Jitendra Padhye , George Varghese , Daniel Firestone
IPC: G06F15/173 , H04L12/911 , H04L12/877 , H04L12/873 , H04L12/863
Abstract: Micro-schedulers control bandwidth allocation for clients, each client subscribing to a respective predefined portion of bandwidth of an outgoing communication link. A macro-scheduler controls the micro-schedulers, by allocating the respective subscribed portion of bandwidth associated with each respective client that is active, by a predefined first deadline, with residual bandwidth that is unused by the respective clients being shared proportionately among respective active clients by a predefined second deadline, while minimizing coordination among micro-schedulers by the macro-scheduler periodically adjusting respective bandwidth allocations to each micro-scheduler.
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公开(公告)号:US20180262599A1
公开(公告)日:2018-09-13
申请号:US15639331
申请日:2017-06-30
Applicant: Microsoft Technology Licensing, LLC
Inventor: Daniel Firestone
Abstract: Computing systems, devices, and associated methods of operation of processing packets in a distributed computing system are disclosed herein. In one embodiment, a method includes receiving a packet having a header with multiple header fields and a payload and parsing one or more of the multiple header fields of the received packet. The method also includes matching the received packet with an rule object from each of multiple layer objects individually containing multiple rule objects based on the parsed one or more of the multiple header fields. The rule object has one or more conditions matching the one or more parsed header fields of the packet and a corresponding flow action. The method further includes generating a composite action by combining the flow actions individually corresponding to one of the matched rule objects from one of multiple layer objects and applying the generated composite action to the packet.
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