Selectively updating branch predictors for loops executed from loop buffers in a processor

    公开(公告)号:US11928474B2

    公开(公告)日:2024-03-12

    申请号:US17832350

    申请日:2022-06-03

    CPC classification number: G06F9/3844 G06F9/325 G06F9/381

    Abstract: Selectively updating branch predictors for loops executed from loop buffers is disclosed herein. In some aspects, a branch predictor update circuit of a processor is configured to detect a loop comprising a plurality of loop instructions in an instruction stream, and to determine that the loop is stored within a loop buffer circuit of the processor. The branch predictor update circuit is further configured to determine a count of potential history register updates to the history register for the plurality of loop instructions, and to determine whether the count of potential history register updates exceeds a size of the history register. The branch predictor update circuit is also configured to, responsive to determining that the count of potential history register updates does not exceed the size of the history register, update a branch predictor of the branch predictor circuit based on the plurality of loop instructions.

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