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公开(公告)号:US08230299B2
公开(公告)日:2012-07-24
申请号:US12715194
申请日:2010-03-01
申请人: Ming Yang , Juntan Zhang , Zhiyong Wu , Fengwen Sun
发明人: Ming Yang , Juntan Zhang , Zhiyong Wu , Fengwen Sun
IPC分类号: G06F11/00
CPC分类号: H03M13/255 , H03M13/1108 , H03M13/1165 , H03M13/43 , H03M13/6527 , H03M13/6533 , H03M13/6544
摘要: An approach is provided for interleaving low density parity check (LDPC) encoded bits in QPSK/8PSK modulation systems. By assigning the bits determining modulation symbols based on different bit degrees, one can efficiently find the desirable tradeoff between error performance and error floor provided by the LDPC codes in use.
摘要翻译: 提供了一种用于在QPSK / 8PSK调制系统中交织低密度奇偶校验(LDPC)编码比特的方法。 通过分配基于不同比特度的确定调制符号的比特,可以有效地找到由正在使用的LDPC码提供的错误性能与错误帧之间的期望权衡。
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公开(公告)号:US20110258521A1
公开(公告)日:2011-10-20
申请号:US12715194
申请日:2010-03-01
申请人: Ming Yang , Juntan Zhang , Zhiyong Wu , Fengwen Sun
发明人: Ming Yang , Juntan Zhang , Zhiyong Wu , Fengwen Sun
CPC分类号: H03M13/255 , H03M13/1108 , H03M13/1165 , H03M13/43 , H03M13/6527 , H03M13/6533 , H03M13/6544
摘要: An approach is provided for interleaving low density parity check (LDPC) encoded bits in QPSK/8PSK modulation systems. By assigning the bits determining modulation symbols based on different bit degrees, one can efficiently find the desirable tradeoff between error performance and error floor provided by the LDPC codes in use.
摘要翻译: 提供了一种用于在QPSK / 8PSK调制系统中交织低密度奇偶校验(LDPC)编码比特的方法。 通过分配基于不同比特度的确定调制符号的比特,可以有效地找到由正在使用的LDPC码提供的错误性能与错误帧之间的期望权衡。
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公开(公告)号:US20110202814A1
公开(公告)日:2011-08-18
申请号:US12710276
申请日:2010-02-22
申请人: Juntan Zhang , Zhiyong Wu , Peng Gao , Fengwen Sun
发明人: Juntan Zhang , Zhiyong Wu , Peng Gao , Fengwen Sun
CPC分类号: H03M13/1102 , H03M13/255 , H03M13/2757 , H03M13/356 , H04L27/183 , H04L27/186 , H04L27/2053
摘要: An approach is provided for interleaving low density parity check (LDPC) encoded bits in 32APSK modulation systems. By assigning the bits determining modulation symbols based on different bit degrees, one can efficiently find the desirable tradeoff between error performance and error floor provided by the LDPC codes in use.
摘要翻译: 提供了一种用于在32APSK调制系统中交织低密度奇偶校验(LDPC)编码比特的方法。 通过分配基于不同比特度的确定调制符号的比特,可以有效地找到由正在使用的LDPC码提供的错误性能与错误帧之间的期望权衡。
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公开(公告)号:US08301960B2
公开(公告)日:2012-10-30
申请号:US12710276
申请日:2010-02-22
申请人: Juntan Zhang , Zhiyong Wu , Peng Gao , Fengwen Sun
发明人: Juntan Zhang , Zhiyong Wu , Peng Gao , Fengwen Sun
IPC分类号: G06F11/00
CPC分类号: H03M13/1102 , H03M13/255 , H03M13/2757 , H03M13/356 , H04L27/183 , H04L27/186 , H04L27/2053
摘要: An approach is provided for interleaving low density parity check (LDPC) encoded bits in 32APSK modulation systems. By assigning the bits determining modulation symbols based on different bit degrees, one can efficiently find the desirable tradeoff between error performance and error floor provided by the LDPC codes in use.
摘要翻译: 提供了一种用于在32APSK调制系统中交织低密度奇偶校验(LDPC)编码比特的方法。 通过分配基于不同比特度的确定调制符号的比特,可以有效地找到由正在使用的LDPC码提供的错误性能与错误帧之间的期望权衡。
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公开(公告)号:US20110307754A1
公开(公告)日:2011-12-15
申请号:US11813206
申请日:2006-09-18
申请人: Fengwen Sun , Ming Yang , Juntan Zhang , Yuhai Shi
发明人: Fengwen Sun , Ming Yang , Juntan Zhang , Yuhai Shi
CPC分类号: H03M13/116 , H03M13/033 , H03M13/1148 , H03M13/1165 , H03M13/1185
摘要: A family of quasi cyclic irregular low density parity check codes for video broadcasting applications. The parity check matrices of the constructed low density parity check codes have quasi-cyclic structures to facilitate hardware implementation and have proper check/bit degree distributions to offer frame error rate performance lower than 10−7.
摘要翻译: 一类用于视频广播应用的准循环不规则低密度奇偶校验码。 构建的低密度奇偶校验码的奇偶校验矩阵具有准循环结构,以便于硬件实现,并具有适当的检查/位度分布,以提供低于10-7的帧错误率性能。
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公开(公告)号:US08689092B2
公开(公告)日:2014-04-01
申请号:US11813206
申请日:2006-09-18
申请人: Fengwen Sun , Ming Yang , Juntan Zhang , Yuhai Shi
发明人: Fengwen Sun , Ming Yang , Juntan Zhang , Yuhai Shi
CPC分类号: H03M13/116 , H03M13/033 , H03M13/1148 , H03M13/1165 , H03M13/1185
摘要: A family of quasi cyclic irregular low density parity check codes for video broadcasting applications. The parity check matrices of the constructed low density parity check codes have quasi-cyclic structures to facilitate hardware implementation and have proper check/bit degree distributions to offer frame error rate performance lower than 10−7.
摘要翻译: 一类用于视频广播应用的准循环不规则低密度奇偶校验码。 构建的低密度奇偶校验码的奇偶校验矩阵具有准循环结构,以便于硬件实现,并具有适当的检查/位度分布,以提供低于10-7的帧错误率性能。
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公开(公告)号:US08028219B2
公开(公告)日:2011-09-27
申请号:US11813201
申请日:2006-09-18
申请人: Juntan Zhang , Peng Gao , Fengwen Sun
发明人: Juntan Zhang , Peng Gao , Fengwen Sun
IPC分类号: G11C29/00
CPC分类号: H03M13/1148 , H03M13/1102 , H03M13/31 , H03M13/356 , H04L1/0058 , H04L1/007 , H04L1/0071 , H04L27/183 , H04L27/186 , H04L27/2053
摘要: An approach is provided for interleaving low density parity check (LDPC) encoded bits in 16ASPK modulation systems. By assigning the bits determining modulation symbols based on different bit degrees, one can efficiently find the desirable tradeoff between error performance and error floor provided by the LDPC codes in use.
摘要翻译: 提供了一种用于在16ASPK调制系统中交织低密度奇偶校验(LDPC)编码比特的方法。 通过分配基于不同比特度的确定调制符号的比特,可以有效地找到由正在使用的LDPC码提供的错误性能与错误帧之间的期望权衡。
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公开(公告)号:US20110164705A1
公开(公告)日:2011-07-07
申请号:US11813208
申请日:2006-09-18
申请人: Juntan Zhang , Jilong Li , Fengwen Sun
发明人: Juntan Zhang , Jilong Li , Fengwen Sun
IPC分类号: H04L27/22
CPC分类号: H03M13/11 , H03M13/1165 , H03M13/255 , H04L27/34 , H04L27/3411
摘要: A digital communication system, having a transmitter to transmit a digital signal; and a receiver to receive the digital signal; wherein the digital signal utilizes a 32APSK system with FEC coding, and the signal is bit-mapped using gray mapping, and bits of the digital signal are ordered based on the values of a log likelihood ratio from a communications channel.
摘要翻译: 一种数字通信系统,具有发送数字信号的发送器; 以及接收器,用于接收数字信号; 其中数字信号利用具有FEC编码的32APSK系统,并且使用灰度映射对信号进行位映射,并且基于来自通信信道的对数似然比的值对数字信号的比特进行排序。
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公开(公告)号:US20110107183A1
公开(公告)日:2011-05-05
申请号:US11813201
申请日:2006-09-18
申请人: Juntan Zhang , Peng Gao , Fengwen Sun
发明人: Juntan Zhang , Peng Gao , Fengwen Sun
IPC分类号: G06F11/10
CPC分类号: H03M13/1148 , H03M13/1102 , H03M13/31 , H03M13/356 , H04L1/0058 , H04L1/007 , H04L1/0071 , H04L27/183 , H04L27/186 , H04L27/2053
摘要: An approach is provided for interleaving low density parity check (LDPC) encoded bits in 16ASPK modulation systems. By assigning the bits determining modulation symbols based on different bit degrees, one can efficiently find the desirable tradeoff between error performance and error floor provided by the LDPC codes in use.
摘要翻译: 提供了一种用于在16ASPK调制系统中交织低密度奇偶校验(LDPC)编码比特的方法。 通过分配基于不同比特度的确定调制符号的比特,可以有效地找到由正在使用的LDPC码提供的错误性能与错误帧之间的期望权衡。
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公开(公告)号:US20110173509A1
公开(公告)日:2011-07-14
申请号:US12717815
申请日:2010-03-04
申请人: Juntan Zhang , Xunchun Li , Fengwen Sun
发明人: Juntan Zhang , Xunchun Li , Fengwen Sun
CPC分类号: H03M13/255 , H04L1/0041 , H04L1/0057
摘要: A digital communication system, having a transmitter to transmit a digital signal; and a receiver to receive the digital signal; wherein the digital signal utilizes a 16APSK system, and the signal is bit-mapped using gray mapping, and bits of the digital signal are ordered based on the values of a log likelihood ratio from a communications channel.
摘要翻译: 一种数字通信系统,具有发送数字信号的发送器; 以及接收器,用于接收数字信号; 其中数字信号利用16APSK系统,并且使用灰度映射对信号进行位映射,并且基于来自通信信道的对数似然比的值对数字信号的位进行排序。
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