Low-cost, high-density light-emitting-diode array and fabrication method thereof
    1.
    发明授权
    Low-cost, high-density light-emitting-diode array and fabrication method thereof 有权
    低成本,高密度发光二极管阵列及其制造方法

    公开(公告)号:US06563138B2

    公开(公告)日:2003-05-13

    申请号:US09750299

    申请日:2000-12-29

    IPC分类号: H01L3300

    CPC分类号: H01L27/153

    摘要: A light-emitting-diode array is formed on a substrate having an upper layer of a semiconducting material and a lower layer of an insulating or semi-insulating material. The upper layer is divided into blocks by isolation channels that cut completely through the upper layer. The light-emitting diodes, which are formed by selective diffusion of an impurity into the upper layer, are arranged in a single row, with at least two light-emitting diodes in each block of the upper layer. Each block has a block electrode that drives the light-emitting diodes in the block. The row of light-emitting diodes is paralleled by a number of shared lines which cross the isolation channels. Each shared line is coupled to a plurality of light-emitting diodes in different blocks.

    摘要翻译: 在具有半导体材料的上层和绝缘或半绝缘材料的下层的基板上形成发光二极管阵列。 上层通过完全穿过上层的隔离通道分成块。 通过将杂质选择性地扩散到上层中而形成的发光二极管以单列排列,在上层的每个块中至少有两个发光二极管。 每个块具有驱动块中的发光二极管的块电极。 这排发光二极管与穿过隔离通道的多条共用线并联。 每个共享线路连接到不同块中的多个发光二极管。

    High-density light-emitting-diode array utilizing a plurality of
isolation channels
    3.
    发明授权
    High-density light-emitting-diode array utilizing a plurality of isolation channels 失效
    利用多个隔离通道的高密度发光二极管阵列

    公开(公告)号:US5955747A

    公开(公告)日:1999-09-21

    申请号:US900064

    申请日:1997-07-23

    IPC分类号: H01L27/15 H01L33/00

    CPC分类号: H01L27/153

    摘要: A light-emitting-diode array is formed on a substrate having an upper layer of a semiconducting material and a lower layer of an insulating or semi-insulating material. The upper layer is divided into blocks by isolation channels that cut completely through the upper layer. The light-emitting diodes, which are formed by selective diffusion of an impurity into the upper layer, are arranged in a single row, with at least two light-emitting diodes in each block of the upper layer. Each block has a block electrode that drives the light-emitting diodes in the block. The row of light-emitting diodes is paralleled by a number of shared lines which cross the isolation channels. Each shared line is coupled to a plurality of light-emitting diodes in different blocks.

    摘要翻译: 在具有半导体材料的上层和绝缘或半绝缘材料的下层的基板上形成发光二极管阵列。 上层通过完全穿过上层的隔离通道分成块。 通过将杂质选择性地扩散到上层中而形成的发光二极管以单列排列,在上层的每个块中至少有两个发光二极管。 每个块具有驱动块中的发光二极管的块电极。 这排发光二极管与穿过隔离通道的多条共用线并联。 每个共享线路连接到不同块中的多个发光二极管。

    Method of fabricating an LED array
    4.
    发明授权
    Method of fabricating an LED array 失效
    制造LED阵列的方法

    公开(公告)号:US5869221A

    公开(公告)日:1999-02-09

    申请号:US997735

    申请日:1997-12-24

    IPC分类号: H01L27/15 G03F9/00

    CPC分类号: H01L27/153

    摘要: A method of fabricating an LED array includes forming a first insulating film composed of aluminum oxide on a semiconductor substrate of a first conductive type; patterning the first insulating film by photolithography to form a plurality of first windows; diffusing an impurity of a second conductive type through the plurality of first windows into the first insulating film, thereby forming a plurality of diffusion regions of the second conductive type below the plurality of first windows; forming a second insulating film on the first insulating film and the plurality of first windows; patterning the second insulating film by photolithography to-remove the second insulating film from the plurality of first windows, using an etchant that does not etch the first insulating film; forming a metal film on the second insulating film and the plurality of first windows; and patterning the metal film by photolithography to form a plurality of electrodes which make electrical contact with respective diffusion regions.

    摘要翻译: 制造LED阵列的方法包括在第一导电类型的半导体衬底上形成由氧化铝构成的第一绝缘膜; 通过光刻图案化第一绝缘膜以形成多个第一窗口; 将通过所述多个第一窗口的第二导电类型的杂质扩散到所述第一绝缘膜中,从而在所述多个第一窗口的下方形成所述第二导电类型的多个扩散区域; 在所述第一绝缘膜和所述多个第一窗口上形成第二绝缘膜; 使用不蚀刻第一绝缘膜的蚀刻剂通过光刻图案化第二绝缘膜以从多个第一窗口去除第二绝缘膜; 在所述第二绝缘膜和所述多个第一窗口上形成金属膜; 并通过光刻法形成金属膜以形成与各个扩散区电接触的多个电极。

    High-resolution light-sensing and light-emitting diode array
    5.
    发明授权
    High-resolution light-sensing and light-emitting diode array 失效
    高分辨率光感应和发光二极管阵列

    公开(公告)号:US5821567A

    公开(公告)日:1998-10-13

    申请号:US763860

    申请日:1996-12-11

    摘要: A light-sensing/emitting diode array chip has impurity diffusion regions with a depth of at least 0.5 .mu.m but not more than 2 .mu.m in a semiconductor substrate. Each impurity diffusion region is preferably divided into a first region, used for emitting or sensing light, and a wider second region, used for electrode contact. The second regions are located on alternate sides of the array line, permitting a small array pitch to be combined with a large contact area. In a wafer process for fabrication of the chips, a diffusion mask has both windows defining the impurity diffusion regions, and dicing line marks. The dicing line marks are narrowed where they pass adjacent to the windows at the ends of the chip. In the electrode fabrication step, a photomask with an enlarged pattern is used, to allow for misalignment with the diffusion mask.

    摘要翻译: 光敏/发光二极管阵列芯片在半导体衬底中具有深度至少为0.5μm但不大于2μm的杂质扩散区域。 每个杂质扩散区优选分为用于发射或感测光的第一区域和用于电极接触的较宽的第二区域。 第二区域位于阵列线的另一侧,允许小的阵列间距与大的接触面积组合。 在用于制造芯片的晶片工艺中,扩散掩模具有限定杂质扩散区域的两个窗口和切割线标记。 切割线标记在其靠近芯片端部的窗口的地方变窄。 在电极制造步骤中,使用具有放大图案的光掩模,以允许与扩散掩模的未对准。

    Led array fabrication process with improved unformity
    6.
    发明授权
    Led array fabrication process with improved unformity 失效
    Led阵列制造工艺具有改进的不整合性

    公开(公告)号:US5733689A

    公开(公告)日:1998-03-31

    申请号:US611410

    申请日:1996-03-06

    IPC分类号: H01L27/15 G03F9/00

    CPC分类号: H01L27/153

    摘要: A method of fabricating an LED array includes (a) forming a first insulating film composed of aluminum oxide on a semiconductor substrate of a first conductive type; (b) patterning the first insulating film by photolithography to form a plurality of first windows; (c) diffusing an impurity of a second conductive type through the plurality of first windows into the first insulating film, thereby forming a plurality of diffusion regions of the second conductive type below the plurality of first windows; (d) forming a second insulating film on the first insulating film and the plurality of first windows; (e) patterning the second insulating film by photolithography to remove the second insulating film from the plurality of first windows, using an etchant that does not etch the first insulating film; (f) forming a metal film on the second insulating film and the plurality of first windows; and (g) patterning the metal film by photolithography to form a plurality of electrodes which make electrical contact with respective diffusion regions.

    摘要翻译: 制造LED阵列的方法包括:(a)在第一导电类型的半导体衬底上形成由氧化铝构成的第一绝缘膜; (b)通过光刻图案化所述第一绝缘膜以形成多个第一窗口; (c)将通过所述多个第一窗口的第二导电类型的杂质扩散到所述第一绝缘膜中,从而在所述多个第一窗口下方形成所述第二导电类型的多个扩散区域; (d)在所述第一绝缘膜和所述多个第一窗口上形成第二绝缘膜; (e)使用不蚀刻第一绝缘膜的蚀刻剂通过光刻对第二绝缘膜图案化以从多个第一窗口去除第二绝缘膜; (f)在所述第二绝缘膜和所述多个第一窗口上形成金属膜; 和(g)通过光刻法形成金属膜以形成与各个扩散区电接触的多个电极。

    Light-emitting diode and light-emitting diode array
    7.
    发明授权
    Light-emitting diode and light-emitting diode array 失效
    发光二极管和发光二极管阵列

    公开(公告)号:US06222208B1

    公开(公告)日:2001-04-24

    申请号:US09089093

    申请日:1998-06-02

    IPC分类号: H01L3300

    摘要: A light-emitting diode includes a first semiconductor epitaxial layer of a first conduction type, a second semiconductor epitaxial layer of the first conduction type laminated upon the first semiconductor epitaxial layer and having an energy band gap greater than that of the first semiconductor epitaxial layer, and an area of impurities formed within the first semiconductor epitaxial layer and the second semiconductor epitaxial layer by doping impurity of a second conduction type from the side of the second semiconductor epitaxial layer. A front of the diode is located within the first semiconductor epitaxial layer.

    摘要翻译: 发光二极管包括第一导电类型的第一半导体外延层,第一导电类型的第二半导体外延层,层压在第一半导体外延层上并具有大于第一半导体外延层的能带隙的能带隙, 以及通过从第二半导体外延层的侧面掺杂第二导电类型的杂质而形成在第一半导体外延层和第二半导体外延层内的杂质区域。 二极管的前部位于第一半导体外延层内。

    Light emitting semiconductor device with stacked structure
    8.
    发明授权
    Light emitting semiconductor device with stacked structure 失效
    具有层叠结构的发光半导体器件

    公开(公告)号:US06180961B2

    公开(公告)日:2001-01-30

    申请号:US09093609

    申请日:1998-06-09

    IPC分类号: H01L3300

    摘要: A high-density semiconductor device and semiconductor device array exhibiting high light emission efficiency which can be mass-produced at low cost with high yield is provided. An LED array comprises a structure wherein an n-type GaAs buffer layer 102 is formed on an n-type GaAs substrate 101, on which are then stacked an n-type AlzGa1−zAs layer 103, an n-type AlyGa1−yAs layer 104, a semi-insulating AlxGa1−xAs layer 105, and a semi-insulating GaAs layer 106. The energy band gaps of the AlzGa1−zAs layer 103 and AlxGa1−xAs layer 105 are at least larger than the energy band gap of the AlyGa1−yAs layer 104. A pn junction is formed by selective diffusion, having a diffusion front in the semiconductor layer having the smaller energy band gap sandwiched between the semiconductor layers having the larger energy band gaps. The outermost layer forming ohmic contact is made a p-type GaAs region formed by zinc diffusion in a semi-insulating GaAs layer.

    摘要翻译: 提供了一种可以以低成本,高产率批量生产的高发光效率的高密度半导体器件和半导体器件阵列。 LED阵列包括其中n型GaAs缓冲层102形成在n型GaAs衬底101上的结构,然后将n型GaAs缓冲层102层叠在n型AlzGa1-zAs层103,n型AllyGa1-yAs层104 ,半绝缘Al x Ga 1-x As层105和半绝缘GaAs层106.AlzGa1-zAs层103和AlxGa1-xAs层105的能带隙至少大于Al y Ga 1-x As层105的能带隙。 通过选择性扩散形成pn结,在半导体层中具有在具有较大能带间隙的半导体层之间具有较小能带隙的扩散前沿。 形成欧姆接触的最外层是在半绝缘GaAs层中通过锌扩散形成的p型GaAs区。

    High-resolution light-sensing and light-emitting diode array and
fabrication method thereof
    9.
    发明授权
    High-resolution light-sensing and light-emitting diode array and fabrication method thereof 有权
    高分辨率光感应和发光二极管阵列及其制造方法

    公开(公告)号:US6136627A

    公开(公告)日:2000-10-24

    申请号:US137073

    申请日:1998-08-20

    摘要: A light-sensing/emitting diode array chip has impurity diffusion regions with a depth of at least 0.5 .mu.m but not more than 2 .mu.m in a semiconductor substrate. Each impurity diffusion region is preferably divided into a first region, used for emitting or sensing light, and a wider second region, used for electrode contact. The second regions are located on alternate sides of the array line, permitting a small array pitch to be combined with a large contact area. In a wafer process for fabrication of the chips, a diffusion mask has both windows defining the impurity diffusion regions, and dicing line marks. The dicing line marks are narrowed where they pass adjacent to the windows at the ends of the chip. In the electrode fabrication step, a photomask with an enlarged pattern is used, to allow for misalignment with the diffusion mask.

    摘要翻译: 光敏/发光二极管阵列芯片在半导体衬底中具有深度至少为0.5μm但不大于2μm的杂质扩散区域。 每个杂质扩散区优选分为用于发射或感测光的第一区域和用于电极接触的较宽的第二区域。 第二区域位于阵列线的另一侧,允许小的阵列间距与大的接触面积组合。 在用于制造芯片的晶片工艺中,扩散掩模具有限定杂质扩散区域的两个窗口和切割线标记。 切割线标记在其靠近芯片端部的窗口的地方变窄。 在电极制造步骤中,使用具有放大图案的光掩模,以允许与扩散掩模的未对准。