公开(公告)号：US5481484A

公开(公告)日：1996-01-02

申请号：US953533

申请日：1992-09-28

申请人： Munehiro Ogawa, deceased ,  Masato Iwabuchi ,  Hitoshi Sugihara ,  Saburo Hojo ,  Masami Kinoshita ,  Osamu Yamashiro ,  Goichi Yokomizo ,  Mikako Miyama

发明人： Munehiro Ogawa, deceased ,  Masato Iwabuchi ,  Hitoshi Sugihara ,  Saburo Hojo ,  Masami Kinoshita ,  Osamu Yamashiro ,  Goichi Yokomizo ,  Mikako Miyama

IPC分类号： G06F11/25 ,  G01R31/3167 ,  G06F17/50 ,  G06J1/00

CPC分类号： G06F17/5022 ,  G01R31/3167 ,  G06F17/5036

摘要： A mixed mode simulation method and apparatus are provided for highly accurately simulating the total characteristics of a digital analyzed circuit portion and an analog analyzed circuit portion, which are both subjected to mixed mode simulation, in consideration of the influence exerted on the analog analyzed circuit portion by a current consumed by the digital analyzed circuit portion. More particularly, a current value of an equivalent circuit for current calculation modeled for providing the analog analyzed circuit portion with a current generated due to an operating state of the digital analyzed circuit portion realized by logic simulation is determined in synchronism with the logic simulation, and the equivalent circuit for current calculation derived thereby is composed with the analog analyzed circuit portion, and this composite circuit is subjected to circuit simulation.

摘要翻译： 考虑到对模拟分析电路部分的影响，提供混合模式模拟方法和装置，用于高精度地模拟数字分析电路部分和模拟分析电路部分的总体特性，它们都经过混合模式模拟 由数字分析电路部分消耗的电流。 更具体地，与逻辑模拟同步地确定由模拟分析电路部分提供由于由逻辑模拟实现的数字分析电路部分的操作状态而产生的电流的电流计算的等效电路的电流值，并且 由此得到的电流计算的等效电路由模拟分析电路部分组成，该复合电路进行电路仿真。

公开(公告)号：US20050139915A1

公开(公告)日：2005-06-30

申请号：US11019273

申请日：2004-12-23

申请人： Takashi Saito ,  Hitoshi Sugihara ,  Saiko Kobayashi

发明人： Takashi Saito ,  Hitoshi Sugihara ,  Saiko Kobayashi

IPC分类号： G06F17/50 ,  H01L21/336 ,  H01L21/82 ,  H01L29/76 ,  H01L29/78

CPC分类号： G06F17/5036

摘要： An element model of a high voltage MOS transistor having a low concentration impurity region between a channel region thereof and a drain electrode thereof is defined by combining a plurality of element models with each other. A basic characteristic is represented by a standard MOS model. A conductivity modulation effect of a low concentration drain diffusion layer is represented by a variable resistor model whose value is changed based upon both a drain voltage and a gate voltage. An overlap capacitance between a gate region and a drain region is represented by a MOS capacitance between the gate region and a bulk. A variable resistor model compensates that a voltage of channel edge portions located adjacent to the low concentration drain diffusion layer is changed by being influenced by not only the gate voltage, but also the drain voltage.

摘要翻译： 通过组合多个元件模型来定义其沟道区域和漏电极之间具有低浓度杂质区域的高压MOS晶体管的元件模型。 基本特征由标准MOS模型表示。 低浓度漏极扩散层的电导率调制效应由可变电阻器型号表示，其值根据漏极电压和栅极电压而改变。 栅极区域和漏极区域之间的重叠电容由栅极区域和体积之间的MOS电容表示。 可变电阻器模型补偿了通过不仅栅极电压而且受到漏极电压的影响而改变位于低浓度漏极扩散层附近的沟道边缘部分的电压。