公开(公告)号：US20210090801A1

公开(公告)日：2021-03-25

申请号：US16944191

申请日：2020-07-31

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Takashi SAWADA ,  Kenichi TOGO

IPC: H01G4/12 ,  H01G4/008 ,  H01G4/224

Abstract: A method of producing a ceramic electronic component includes baking a first electrode paste containing a metal powder at a first temperature to form a first electrode layer at a first region of a ceramic body, baking a second electrode paste containing a metal powder of the same type as the metal powder in the first electrode paste at a second temperature lower than the first temperature to form a second electrode layer at a second region different from the first region of the ceramic body, and applying a physical shock treatment to a surface of the second electrode layer to densify a surface layer portion of the second electrode layer.

公开(公告)号：US20170334230A1

公开(公告)日：2017-11-23

申请号：US15598336

申请日：2017-05-18

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Takashi SAWADA ,  Kenichi TOGO

IPC: B41N1/16 ,  H01G4/248 ,  H01G4/12 ,  H01G4/30 ,  H01G4/012

CPC classification number: B41N1/16 ,  H01G4/012 ,  H01G4/12 ,  H01G4/232 ,  H01G4/248 ,  H01G4/30

Abstract: A gravure printing plate includes a cylindrical or substantially cylindrical gravure roller with a peripheral surface. Plural cells corresponding to a pattern to be printed are disposed on the peripheral surface of the gravure roller. First and second regions are provided on the peripheral surface of the gravure roller. The pattern to be printed includes at least two patterns. Plural cells corresponding to one of the two patterns are disposed in the first region. Plural cells corresponding to the other one of the two patterns are disposed in the second region.

公开(公告)号：US20230197338A1

公开(公告)日：2023-06-22

申请号：US17985195

申请日：2022-11-11

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Akira ISHIZUKA ,  Kenichi TOGO

IPC: H01G4/005 ,  H01G4/30 ,  H01G4/248 ,  H01G4/232

CPC classification number: H01G4/005 ,  H01G4/30 ,  H01G4/232 ,  H01G4/248

Abstract: A multilayer ceramic capacitor includes a multilayer body and three or more external electrodes. A first internal electrode layer includes a first counter electrode portion, a first extension portion, and a second extension portion. The first counter electrode portion includes a first central region, a first connection region connected to the first extension portion, and a second connection region connected to the second extension portion. Coverages of the first and second connection regions with respect to the dielectric layers are higher than a coverage of the first central region with respect to the dielectric layers, and coverages of the first and second extension portions with respect to the dielectric layers are higher than the coverage of the first central region with respect to the dielectric layers.

公开(公告)号：US20220068562A1

公开(公告)日：2022-03-03

申请号：US17403914

申请日：2021-08-17

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Kenichi TOGO

IPC: H01G4/012 ,  H01G4/232 ,  H01G4/30 ,  H01G4/12 ,  H01G4/008 ,  H01G2/06

Abstract: A multilayer ceramic capacitor includes a multilayer body, a first outer electrode on a first main surface closer to a first end surface, a second outer electrode on the first main surface closer to a second end surface, a third outer electrode on the first main surface between the first outer electrode and the second outer electrode, a first inner electrode layer connected to the first outer electrode and the second outer electrode via a first lead electrode and a second lead electrode, and a second inner electrode layer connected to the third outer electrode via a third lead electrode. When a length of the first lead electrode and a length of the second lead electrode in the width direction are each denoted by a, and a length of the third lead electrode in the width direction is denoted by b, b/a is about 0.5 to about 0.83.

公开(公告)号：US20180182552A1

公开(公告)日：2018-06-28

申请号：US15850114

申请日：2017-12-21

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Takashi SAWADA ,  Yoshinao NISHIOKA ,  Kenichi TOGO

IPC: H01G4/248 ,  H01G4/30 ,  H01G4/232

Abstract: A multilayer ceramic capacitor includes a substantially cuboid laminated body including ceramic layers and internal electrode layers laminated, and two or more exposed regions where the plurality of internal electrode layers are exposed, and external electrodes, wherein at least one of the external electrodes is an external electrode with resistance, the internal electrode layers include a first internal electrode layer and a second internal electrode layer opposed to the first internal electrode layer in the lamination direction, and the external electrode with resistance includes a thin film electrode layer in direct contact with the internal electrode layer in the exposed region, a resistive electrode layer provided on the thin film electrode layer, and an upper electrode layer provided on the resistive electrode layer, which has a lower electrical resistivity lower than the resistive electrode layer.