公开(公告)号：US20230352242A1

公开(公告)日：2023-11-02

申请号：US18212809

申请日：2023-06-22

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Suguru NAKANO ,  Satoshi MURAMATSU ,  Risa HOJO ,  Yoshiyuki NOMURA

IPC: H01G4/30 ,  H01G4/012 ,  H01G2/06 ,  H01G4/008 ,  H01G4/12

CPC classification number: H01G4/30 ,  H01G4/012 ,  H01G2/065 ,  H01G4/008 ,  H01G4/1218

Abstract: A multilayer ceramic capacitor includes a laminate including dielectric layers and internal electrode layers, and first and second external electrodes on surfaces of the laminate. The laminate includes first and second main surfaces oppose each other in a lamination direction, first and second side surfaces oppose each other in a length direction perpendicular or substantially perpendicular to the lamination direction, and third and fourth side surfaces oppose each other in a width direction perpendicular or substantially perpendicular to the lamination direction and the length direction. A length ratio EB1/EA1 of the first external electrode wrapping around to main surfaces of the laminate is about 0 or more and about 0.5 or less. A length ratio EB2/EA2 of the second external electrode wrapping around to the main surfaces of the laminate is about 0 or more and about 0.5 or less.

公开(公告)号：US20230133747A1

公开(公告)日：2023-05-04

申请号：US18092496

申请日：2023-01-03

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Suguru NAKANO ,  Satoshi MURAMATSU ,  Risa HOJO ,  Yoshiyuki NOMURA

IPC: H01G4/12 ,  H01G4/30 ,  H01G4/008 ,  H01G4/012

Abstract: A mounting structure of a multilayer ceramic capacitor includes a substrate, and a multilayer ceramic capacitor connected to the substrate and including a laminate including dielectric layers and internal electrode layers, and external electrodes on main surfaces of the laminate. The laminate further includes first, second, third, and fourth via conductors connecting the internal electrode layers and the external electrodes. The external electrodes include first, second, third, and fourth external electrodes, each connected to respective end surfaces of the via conductor. Each of the external electrodes does not extend to the side surfaces of the laminate. A ratio W/L of a dimension W in the width direction of the multilayer ceramic capacitor to a dimension L in the length direction of the multilayer ceramic capacitor is about 0.85 or more and about 1 or less.

公开(公告)号：US20210183570A1

公开(公告)日：2021-06-17

申请号：US17118667

申请日：2020-12-11

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Suguru NAKANO ,  Satoshi MURAMATSU ,  Risa HOJO ,  Yoshiyuki NOMURA

IPC: H01G4/12 ,  H01G4/012 ,  H01G4/008 ,  H01G4/30

Abstract: A multilayer ceramic capacitor includes: a laminate including dielectric layers and internal electrode layers; and external electrodes on the main surfaces of the laminate. The laminate further includes a first via conductor, a second via conductor, a third via conductor, and a fourth via conductor that connect the internal electrode layers and the external electrodes. The external electrodes include first external electrodes, second external electrodes, third external electrodes, and fourth external electrodes, each connected to the respective end surfaces of the via conductor. Each of the external electrodes does not extend to the side surfaces of the laminate. A ratio W/L of a dimension W in the width direction of the multilayer ceramic capacitor to a dimension L in the length direction of the multilayer ceramic capacitor is about 0.85 or more and about 1 or less. The dimension L in the length direction of the multilayer ceramic capacitor is about 750 μm or smaller.

公开(公告)号：US20210241976A1

公开(公告)日：2021-08-05

申请号：US17126263

申请日：2020-12-18

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Suguru NAKANO ,  Risa HOJO ,  Akira TANAKA ,  Toru NISHIKAWA ,  Satoshi MURAMATSU

IPC: H01G4/30 ,  H01G4/012 ,  H01G4/12 ,  H01G4/008 ,  H01G2/06

Abstract: A multilayer ceramic capacitor has a relationship of about 10°≤θ1≤about 50° and a relationship of about 10°≤θ2≤about 50°, where θ1 denotes an angle between a first end surface and a perpendicular extending from a side of a first main surface at a point of intersection of the first main surface and the first end surface, and θ2 denotes an angle between a second end surface and a perpendicular extending from a side of the first main surface at a point of intersection of the first main surface and the second end surface.

公开(公告)号：US20210183581A1

公开(公告)日：2021-06-17

申请号：US17119263

申请日：2020-12-11

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Suguru NAKANO ,  Satoshi MURAMATSU ,  Risa HOJO ,  Yoshiyuki NOMURA

IPC: H01G4/30 ,  H01G4/012 ,  H01G4/12 ,  H01G4/008 ,  H01G2/06

Abstract: A multilayer ceramic capacitor includes a laminate including dielectric layers and internal electrode layers, and external electrodes on surfaces of the laminate. A silane coupling agent layer is on at least a mounting surface among surfaces of the laminate. The silane coupling agent layer is made of a fluorine-based silane coupling agent, and a silane coupling agent concentration on the mounting surface is about 0.1 or higher and about 365 or lower and is higher than a silane coupling agent concentration on a counter surface opposing the mounting surface, or the silane coupling agent layer is made of a carbon-based silane coupling agent, and a silane coupling agent concentration on the mounting surface is about 0.91 or higher and about 38.10 or lower and is higher than a silane coupling agent concentration on a counter surface opposing the mounting surface.