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公开(公告)号:US20240395465A1
公开(公告)日:2024-11-28
申请号:US18792625
申请日:2024-08-02
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Kazuhiro NISHIBAYASHI , Yuko KAWASAKI , Satoshi ISHITOBI
Abstract: A multilayer ceramic capacitor includes a multilayer body including internal electrode layers and dielectric layers alternately laminated, and external electrodes on at least a pair of opposite outer surfaces of the multilayer body and extending in a lamination direction. Each internal electrode layer includes a counter portion and a lead-out portion extending from the counter portion to the external electrode, and the counter portion of one of a pair of the internal electrode layers adjacent to each other in the lamination direction overlaps with the counter portion of each of a remainder of the internal electrode layers. The counter portion includes on edges thereof a convex-concave portion including a convexity and a concavity alternating with each other, the convexity bending toward the outer surface adjacent to the edge, the concavity bending away from the outer surface adjacent to the edge.
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公开(公告)号:US20230238183A1
公开(公告)日:2023-07-27
申请号:US18070512
申请日:2022-11-29
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Kazuhiro NISHIBAYASHI , Satoshi ISHITOBI , Takashi SAWADA , Yuko KAWASAKI
CPC classification number: H01G4/248 , H01G4/30 , H01G4/008 , H01G4/1227
Abstract: A three-terminal multilayer ceramic capacitor includes at least one surface electrode layer on a surface of a second internal electrode layer connected to a lateral surface external electrode. The surface electrode layer includes at least one of Sn, In, Ga, Zn, Bi, Pb, Fe, V, Y or Cu, which is different from a main component of the second internal electrode layer.
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公开(公告)号:US20210027949A1
公开(公告)日:2021-01-28
申请号:US16926925
申请日:2020-07-13
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Yuji KOBAYASHI , Tomohiro SASAKI , Yuichiro TANAKA , Daisuke OYAMA , Satoshi ISHITOBI
Abstract: A capacitor component includes a laminate including dielectric layers and internal electrode layers, first and second external electrodes respectively provided on first and second end surfaces of the laminate, and a third external electrode provided on at least one of first and second lateral surfaces of the laminate. The internal electrode layers include a first internal electrode layer connected to the first external electrode and not connected to either the second or the third external electrode; a second internal electrode layer connected to the second external electrode and not connected to either the first or the third external electrode; a third internal electrode layer not connected to any of the first, the second, or the third external electrode; and a fourth internal electrode layer connected to the third external electrode and not connected to either the first or the second external electrode.
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