公开(公告)号：US20200312568A1

公开(公告)日：2020-10-01

申请号：US16822069

申请日：2020-03-18

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Toshihiro HARADA ,  Yohei MUKOBATA

IPC: H01G4/30 ,  H01G4/12 ,  H01G4/012

Abstract: A multilayer ceramic capacitor includes a laminate including a dielectric ceramic layer and first and second internal electrode layers laminated in a lamination direction, and first and second external electrode connected to the internal electrode layers. The laminate includes a central layer portion, a peripheral layer portion sandwiching the central layer portion, and a side margin sandwiching the central layer portion and the peripheral layer portion. The side margin including an inner layer and an outer layer. In a cross section including a lamination direction and a width direction obtained by cutting the laminate at a central portion in a length direction, Si is segregated in an inner region including the inner layer and a boundary between the inner layer and the central layer portion, and a Si segregation spot in the inner region has a larger area than a Si segregation spot in the outer layer.

公开(公告)号：US20240407101A1

公开(公告)日：2024-12-05

申请号：US18800548

申请日：2024-08-12

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Toshihiro HARADA

IPC: H05K1/18 ,  H01G2/06 ,  H01G4/232 ,  H01G4/30 ,  H05K1/11

Abstract: A layered ceramic electronic component mounting structure includes a layered ceramic electronic component mounted on a circuit board. The layered ceramic electronic component includes a layered body including an inner conductor layer and dielectric layers, and first and second outer electrodes located on only two principal surfaces or on only one principal surface of the layered body. The circuit board includes first and second land electrodes. An inside end of the first outer electrode is closer to the second outer electrode and the second land electrode than an inside end of the first land electrode, and an inside end of the second outer electrode is closer to the first outer electrode and the first land electrode than an inside end of the second land electrode.

公开(公告)号：US20240177931A1

公开(公告)日：2024-05-30

申请号：US18436162

申请日：2024-02-08

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Satoshi YOKOMIZO ,  Toshihiro HARADA

IPC: H01G4/12 ,  H01G4/008 ,  H01G4/012 ,  H01G4/232 ,  H01G4/30

CPC classification number: H01G4/1227 ,  H01G4/012 ,  H01G4/2325 ,  H01G4/008 ,  H01G4/30

Abstract: A multilayer ceramic capacitor includes a laminate and



an external electrode connected to the internal electrode layer. The laminate includes a central layer portion in which an internal electrode layer and a dielectric ceramic layer are alternately laminated, and a covering portion covering an outer surface of the central layer portion in the lamination direction and the width direction. A region where the main surface meets the lateral surface in the laminate is defined as a corner portion that is rounded, and a distance from the corner portion to an internal electrode closest to the corner portion is about 20 μm or less.

公开(公告)号：US20230238180A1

公开(公告)日：2023-07-27

申请号：US18121629

申请日：2023-03-15

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Satoshi YOKOMIZO ,  Toshihiro HARADA

IPC: H01G4/12 ,  H01G4/012 ,  H01G4/232

CPC classification number: H01G4/1227 ,  H01G4/012 ,  H01G4/2325 ,  H01G4/008

Abstract: A multilayer ceramic capacitor includes a laminate and
an external electrode connected to the internal electrode layer. The laminate includes a central layer portion in which an internal electrode layer and a dielectric ceramic layer are alternately laminated, and a covering portion covering an outer surface of the central layer portion in the lamination direction and the width direction. A region where the main surface meets the lateral surface in the laminate is defined as a corner portion that is rounded, and a distance from the corner portion to an internal electrode closest to the corner portion is about 20 µm or less.

公开(公告)号：US20200312554A1

公开(公告)日：2020-10-01

申请号：US16822065

申请日：2020-03-18

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Satoshi YOKOMIZO ,  Toshihiro HARADA

IPC: H01G4/12 ,  H01G4/012 ,  H01G4/232

Abstract: A multilayer ceramic capacitor includes a laminate and an external electrode. The laminate includes a central layer portion in which first and second internal electrode layers are alternately laminated with a dielectric ceramic layer therebetween, a peripheral layer portion sandwiching the central layer portion in a lamination direction, and a side margin sandwiching the central layer portion and the peripheral layer portion in a width direction. When viewing the laminate and the first external electrode through a cross-section parallel to the width direction and the lamination direction at a central portion in a length direction of the first external electrode, W1>R1 is satisfied and T1>R1 is satisfied.

公开(公告)号：US20190355518A1

公开(公告)日：2019-11-21

申请号：US16395292

申请日：2019-04-26

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Toshihiro HARADA

IPC: H01G4/232 ,  H01G4/30

Abstract: A multilayer ceramic capacitor includes a laminate including dielectric layers and internal electrode layers, and first and second external electrodes respectively including first and second base electrode layers. The internal electrode layers, and the first and second base electrode layers are connected through first and second alloy layers that cover first and second end surfaces of the laminate. A predetermined portion of ridges between each of the first and second end surfaces, and each of first and second principal surfaces and first and second side surfaces, among ridges of the laminate, has a curvature radius of about 5.4 μm or more and about 10 μm or less, and the first and second external electrodes extend from the first and second end surfaces to cover the ridges.

公开(公告)号：US20240194411A1

公开(公告)日：2024-06-13

申请号：US18400411

申请日：2023-12-29

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Hikaru OKUDA ,  Toshihiro HARADA

IPC: H01G4/30 ,  H01G4/008 ,  H01G4/012 ,  H01G4/12

CPC classification number: H01G4/30 ,  H01G4/008 ,  H01G4/012 ,  H01G4/1227

Abstract: A multilayer ceramic capacitor includes a multilayer body including dielectric layers and internal electrode layers stacked together, and external electrodes. The multilayer body includes an inner layer portion and outer layer portions in a stacking direction, and an electrode opposing portion and gap portions in a length direction. The multilayer body further includes conductor portions in the two outer layer portions in the gap portions, and each includes conductor layers stacked in the stacking direction. One of that conductor layers that is closest to a middle in the stacking direction of the multilayer body is closer to the middle in the stacking direction of the multilayer body than another of the internal electrode layers closest in the stacking direction to a main surface of the multilayer body.

公开(公告)号：US20230034387A1

公开(公告)日：2023-02-02

申请号：US17835277

申请日：2022-06-08

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Hikaru OKUDA ,  Toshihiro HARADA

IPC: H01G4/30 ,  H01G4/12 ,  H01G4/008 ,  H01G4/012

Abstract: A multilayer ceramic capacitor includes a multilayer body including dielectric layers and internal electrode layers stacked together, and external electrodes. The multilayer body includes an inner layer portion and outer layer portions in a stacking direction, and an electrode opposing portion and gap portions in a length direction. The multilayer body further includes conductor portions in the two outer layer portions in the gap portions, and each includes conductor layers stacked in the stacking direction. One of that conductor layers that is closest to a middle in the stacking direction of the multilayer body is closer to the middle in the stacking direction of the multilayer body than another of the internal electrode layers closest in the stacking direction to a main surface of the multilayer body.

公开(公告)号：US20190392991A1

公开(公告)日：2019-12-26

申请号：US16401506

申请日：2019-05-02

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Toshihiro HARADA

IPC: H01G4/12 ,  H01G2/06 ,  H01G4/228

Abstract: An electronic component includes a laminate and an external electrode provided on an end surface of the laminate. The external electrode includes a Ni layer provided on the end surface, a Ni—Sn alloy layer provided on the Ni layer, and a resin layer that is provided on the Ni—Sn alloy layer and includes metal grains including Sn grains. The Ni layer and the Ni—Sn alloy layer reduce or prevent intrusion of moisture from the external electrode into an interior of the laminate, and the resin layer reduces or prevents generation of cracks when a bending stress is applied to the external electrode.