公开(公告)号：US20220093333A1

公开(公告)日：2022-03-24

申请号：US17463740

申请日：2021-09-01

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Tetsuya KISUMI ,  Yusuke YOKOTA

IPC: H01G4/12 ,  H01G4/30

Abstract: A method for producing a ceramic electronic component includes providing an outer electrode, which includes forming a baked electrode layer by applying an electrically conductive paste including an electrically conductive metal and glass such that the electrically conductive paste covers an exposed portion of an inner electrode on a ceramic body and baking the applied electrically conductive paste, and forming a plating film on the surface of the baked electrode layer by electroplating. The baked electrode layer includes metal portions and glass portions distributed in contact with the metal portions. After the formation of the baked electrode layer, the surface of the baked electrode layer is subjected to barrel or blast processing using a powder having a Mohs hardness equal to or lower than that of the ceramic body.

公开(公告)号：US20210134530A1

公开(公告)日：2021-05-06

申请号：US17076846

申请日：2020-10-22

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Yusuke YOKOTA

IPC: H01G4/30 ,  H01G4/248 ,  H01G4/012 ,  H01G4/12

Abstract: A multilayer ceramic electronic component includes a laminate including dielectric ceramic layers and at least a pair of internal electrode layers laminated together, the laminate including a pair of main surfaces that oppose each other in a lamination direction, a pair of side surfaces that oppose each other in a width direction perpendicular or substantially perpendicular to the lamination direction, and a pair of end surfaces that oppose each other in a length direction perpendicular or substantially perpendicular to the lamination direction and the width direction, a pair of side surface layers respectively provided on the side surfaces of the laminate, a pair of main surface layers covering interfaces between the laminate and the side surface layers respectively provided on the main surfaces of the laminate, and a pair of external electrodes respectively connected to the internal electrode layers respectively provided on the end surfaces of the laminate.

公开(公告)号：US20210090811A1

公开(公告)日：2021-03-25

申请号：US17016687

申请日：2020-09-10

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Yusuke YOKOTA ,  Togo MATSUI

IPC: H01G4/30 ,  H01G4/248 ,  H01G13/00 ,  H01G4/232

Abstract: A multilayer ceramic electronic component includes a multilayer body including two major surfaces opposite to each other in a layer stacking direction, two side surfaces opposite to each other in a widthwise direction orthogonal or substantially orthogonal to the layer stacking direction, and two end surfaces opposite to each other in a lengthwise direction orthogonal or substantially orthogonal to the layer stacking direction and the widthwise direction, and external electrodes provided on the two end surfaces. A method for manufacturing the multilayer ceramic capacitor component includes preparing a plurality of multilayer bodies, stacking the plurality of multilayer bodies via a binder, rotating the plurality of multilayer bodies by about 90° with the lengthwise direction defining and functioning as an axis of rotation, and providing a side gap portion; and removing the binder from the multilayer body provided with the side gap portion.

公开(公告)号：US20230032904A1

公开(公告)日：2023-02-02

申请号：US17859154

申请日：2022-07-07

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Yusuke YOKOTA

IPC: H01G4/30 ,  H01G4/012 ,  H01G4/12 ,  H01G2/14

Abstract: A multilayer ceramic capacitor includes a multilayer body including internal electrode layers and dielectric layers alternately laminated therein, and external electrodes respectively on end surfaces in a length direction intersecting a lamination direction in the multilayer body, and being electrically connected to the internal electrode layers. The internal electrode layers each include an opposing portion and an extension portion. The opposing portion of one internal electrode layer is opposed to an opposing portion of another internal electrode layer adjacent in the lamination direction. The extension portion extends from the opposing portion and is connected to one of the external electrodes in the length direction. The dielectric layers each have a thickness of about 0.3 μm or more and about 0.5 μm or less, and the internal electrode layers include short-circuit prevention internal electrode layers each including a thin portion with a thickness is no more than about 1/20 the thickness of the dielectric layer in the opposing portion.