Display device and method of driving the same
    2.
    发明申请
    Display device and method of driving the same 审中-公开
    显示装置及其驱动方法

    公开(公告)号:US20060176263A1

    公开(公告)日:2006-08-10

    申请号:US11256449

    申请日:2005-10-20

    IPC分类号: G09G3/36

    摘要: A display device includes a data driver, an inverter, a display panel, and an intercept unit. The data driver provides an image signal and the scan driver generates a control signal corresponding to the image signal. The inverter provides an inverted control signal. The display panel has a PMOS transistor that provides the image signal to a pixel electrode based on the inverted control signal. The interception unit intercepts an abnormal signal that is forwarded to the PMOS transistor. Therefore, a signal having an abnormal voltage level may be interrupted to prevent display defects resulting from the abnormal voltage level.

    摘要翻译: 显示装置包括数据驱动器,逆变器,显示面板和截距单元。 数据驱动器提供图像信号,扫描驱动器产生对应于图像信号的控制信号。 逆变器提供反相控制信号。 显示面板具有PMOS晶体管,其基于反相控制信号将图像信号提供给像素电极。 拦截单元拦截转发到PMOS晶体管的异常信号。 因此,可能中断具有异常电压电平的信号,以防止由异常电压电平引起的显示缺陷。

    Array substrate and display device having the same
    3.
    发明申请
    Array substrate and display device having the same 有权
    阵列基板和显示装置

    公开(公告)号:US20070063233A1

    公开(公告)日:2007-03-22

    申请号:US11454651

    申请日:2006-06-16

    IPC分类号: H01L31/113

    摘要: An array substrate includes a base substrate, a plurality of gate lines, a plurality of data lines and a pixel matrix. The plurality of gate lines and the plurality of data lines define pixel areas. The pixel matrix is formed on each pixel area, and includes a plurality of pixel columns and pixel rows. Each pixel column has a first pixel group and a second pixel group. The first pixel group is electrically connected to a first gate line adjacent to the pixel column. The second pixel group is electrically connected to a second gate line adjacent to the pixel column. Each pixel row is electrically connected to one data line adjacent to the pixel column.

    摘要翻译: 阵列基板包括基底基板,多条栅极线,多条数据线和像素矩阵。 多个栅极线和多个数据线限定像素区域。 像素矩阵形成在每个像素区域上,并且包括多个像素列和像素行。 每个像素列具有第一像素组和第二像素组。 第一像素组电连接到与像素列相邻的第一栅极线。 第二像素组电连接到与像素列相邻的第二栅极线。 每个像素行电连接到与像素列相邻的一个数据线。

    DISTRIBUTED SYSTEM CHECKER
    4.
    发明申请
    DISTRIBUTED SYSTEM CHECKER 有权
    分布式系统检查器

    公开(公告)号:US20100125758A1

    公开(公告)日:2010-05-20

    申请号:US12272779

    申请日:2008-11-17

    IPC分类号: G06F11/34

    CPC分类号: G06F11/362

    摘要: A distributed system checker may check a distributed system against events to detect bugs in the distributed system. The events may include machines crashes, network partitions, and packet losses, for example. The distributed system checker may check a distributed system that can have multiple threads and multiple processes running on multiple nodes. To obtain control over a distributed system, a distributed system checker may insert an interposition layer between a process and the operating system on each node.

    摘要翻译: 分布式系统检查器可以根据事件检查分布式系统以检测分布式系统中的错误。 例如,事件可能包括机器崩溃,网络分区和数据包丢失。 分布式系统检查器可以检查可以在多个节点上运行多个线程和多个进程的分布式系统。 为了获得对分布式系统的控制,分布式系统检查器可以在进程和每个节点上的操作系统之间插入插入层。

    Efficient approaches for bounded model checking
    5.
    发明授权
    Efficient approaches for bounded model checking 失效
    有限模型检查的有效方法

    公开(公告)号:US07711525B2

    公开(公告)日:2010-05-04

    申请号:US10157486

    申请日:2002-05-30

    IPC分类号: G06F17/10

    CPC分类号: G06F17/504

    摘要: A method for bounded model checking of arbitrary Linear Time Logic temporal properties. The method comprises translating properties associated with temporal operators F(p), G(p), U(p, q) and X(p) into property checking schemas comprising Boolean satisfiability checks, wherein F represents an eventuality operator, G represents a globally operator, U represents an until operator and X represents a next-time operator. The overall property is checked in a customized manner by repeated invocations of the property checking schemas for F(p), G(p), U(p, q), X(p) operators and standard handling of atomic propositions and Boolean operators.

    摘要翻译: 一种用于任意线性时间逻辑时间属性的有界模型检查的方法。 该方法包括将与时间运算符F(p),G(p),U(p,q)和X(p)相关联的属性转换成包括布尔可满足性检查的属性检查模式,其中F表示可能性运算符,G表示全局 运算符,U表示直到运算符,X表示下一运算符。 通过重复调用F(p),G(p),U(p,q),X(p)运算符的属性检查模式以及原子命题和布尔运算符的标准处理来检查整体属性。

    Quantified boolean formula (QBF) solver
    6.
    发明授权
    Quantified boolean formula (QBF) solver 有权
    量化布尔公式(QBF)求解器

    公开(公告)号:US07249333B2

    公开(公告)日:2007-07-24

    申请号:US11038958

    申请日:2005-01-18

    申请人: Yuan Yu Lintao Zhang

    发明人: Yuan Yu Lintao Zhang

    IPC分类号: G06F17/50 G06F17/10

    CPC分类号: G06F17/504 G06F17/11

    摘要: Quantified Boolean formula (QBF) techniques are used in determining QBF satisfiability. A QBF is broken into component parts that are analyzable by a satisfiability (SAT) solver. Each component is then independently, and perhaps in parallel, analyzed for satisfiability. If a component is unsatisfiable, then it is determined that the QBF is unsatisfiable, and the analysis is stopped. If a component is satisfiable, then an assignment corresponding to the satisfiable component is noted. If a component is satisfiable, then it is appended to another untested component to provide a combination component, and the satisfiability of the combination component is analyzed. Such appending and analysis is repeated until the QBF is completed and determined to be satisfiable or determined to be unsatisfiable.

    摘要翻译: 量化布尔公式(QBF)技术用于确定QBF可满足性。 QBF被分解成可满足性(SAT)求解器可分析的组件。 然后分析每个组件的可靠性,并且可能并行地进行分析。 如果组件不能令人满意,则确定QBF不可满足,并且分析停止。 如果组件是可满足的,则记录对应于可满足组件的分配。 如果组件可满足,则将其附加到另一未测试组件以提供组合组件,并分析组合组件的可满足性。 重复这种附加和分析直到QBF完成并确定为满足或确定为不满意。

    Reconfigurable automatic gain control and method for optical amplifier
    9.
    发明授权
    Reconfigurable automatic gain control and method for optical amplifier 失效
    可重构自动增益控制和光放大器的方法

    公开(公告)号:US06417964B1

    公开(公告)日:2002-07-09

    申请号:US09777162

    申请日:2001-02-05

    IPC分类号: H04B1012

    CPC分类号: H04B10/2931

    摘要: A reconfigurable AGC loop design for an optical amplifier with a software provisional switch in the AGC loop inside the optical amplifier is disclosed. On the input side, there is a 1×m switch for switching a first input to the input of an optical amplifier, or to route other external pins to the optical amplifier. On the output side, there is a 1×n switch for switching a first output to the output of an optical amplifier, or to route other external pins to the optical amplifier. The AGC loop inside an optical amplifier is available to operate with other external signals. This reconfigurability unleashes the AGC loop capability that is traditionally confined to individual optical amplifier, provides flexibility, and greatly simplifies the design of optical node.

    摘要翻译: 公开了一种用于具有在光放大器内的AGC环路中的软件临时开关的光放大器的可重构AGC环路设计。 在输入端,有一个1xm开关,用于将第一个输入切换到光放大器的输入端,或将其他外部引脚连接到光放大器。 在输出端,有一个1xn开关,用于将第一个输出切换到光放大器的输出,或将其他外部引脚连接到光放大器。 光放大器内的AGC环路可用于与其他外部信号一起工作。 这种可重新配置释放了传统上限于单个光放大器的AGC环路功能,提供了灵活性,并大大简化了光节点的设计。

    Incremental computing for web search
    10.
    发明授权
    Incremental computing for web search 有权
    网页搜索的增量计算

    公开(公告)号:US08560509B2

    公开(公告)日:2013-10-15

    申请号:US13178495

    申请日:2011-07-08

    IPC分类号: G06F17/30

    CPC分类号: G06F17/30902

    摘要: Architecture that performs incremental computing for web searches by employing methods at least for storing the results of repeat queries on unchanged webpages and for computing results for the repeated queries. The architecture includes one or more algorithms for pre-computing query results on index servers, for only selectively choosing index servers whose result for a query change for a query computation process, and for re-using the unchanged web pages stored in the cache and computing results upon changed index and unchanged index separately.

    摘要翻译: 通过采用至少用于存储不变网页上的重复查询结果以及重复查询的计算结果的方法,为网页搜索执行增量计算的体系结构。 架构包括用于在索引服务器上预先计算查询结果的一种或多种算法,用于仅选择性地选择其查询计算过程的查询结果的结果的索引服务器,以及重新使用存储在高速缓存和计算中的不变网页 分别指标变动指数和不变指数。