公开(公告)号：US20130069097A1

公开(公告)日：2013-03-21

申请号：US13676754

申请日：2012-11-14

Applicant: NEC LCD TECHNOLOGIES, LTD.

Inventor： Shigeru MORI ,  Takahiro KORENARI ,  Hiroshi TANABE

IPC: H01L33/58 ,  H01L29/78

CPC classification number: H01L33/58 ,  H01L29/7833 ,  H01L29/78621 ,  H01L29/78633

Abstract: The present invention provides a thin-film transistor manufactured on a transparent substrate having a structure of a top gate type crystalline silicon thin-film transistor in which a light blocking film, a base layer, a crystalline silicon film, a gate insulating film, and a gate electrode film arranged not to overlap at least a channel region are sequentially formed on the transparent substrate; wherein the channel region having channel length L, LDD regions having LDD length d on both sides of the channel region, a source region, and a drain region are formed in the crystalline silicon film; the light blocking film is divided across the channel region; and interval x between the divided light blocking films is equal to or larger than channel length L and equal to or smaller than a sum of channel length L and a double of LDD length d (L+2d). Thereby, the cost for manufacturing the thin-film transistor is low, and the photo leak current of the thin-film transistor is suppressed.

Abstract translation: 本发明提供一种制造在具有顶栅型晶体硅薄膜晶体管的透明基板上的薄膜晶体管，其中遮光膜，基底层，晶体硅膜，栅极绝缘膜和 在透明基板上依次形成布置成不与至少沟道区重叠的栅电极膜; 其中在晶体硅膜中形成具有沟道长度L的沟道区，沟道区两侧具有LDD长度d的LDD区，源区和漏区; 遮光膜在通道区域分割; 并且分割的遮光膜之间的间隔x等于或大于沟道长度L并且等于或小于沟道长度L和LDD长度d（L + 2d）的两倍的总和。 因此，制造薄膜晶体管的成本低，并且薄膜晶体管的光漏电流被抑制。