公开(公告)号：US20150228234A1

公开(公告)日：2015-08-13

申请号：US14339753

申请日：2014-07-24

Applicant: NOVATEK MICROELECTRONICS CORP.

Inventor： Chieh-An LIN ,  Chun-Yung CHO ,  Jhih-Siou CHENG

IPC: G09G3/36 ,  G05F3/16

CPC classification number: G09G3/3614 ,  G09G3/3685 ,  G09G2310/027 ,  G09G2310/0291

Abstract: A buffer circuit, a display module, and a display driving method are disclosed. The buffer circuit comprises a positive polarity buffer, a negative polarity buffer. The positive polarity buffer receives a first supply voltage and a second supply voltage to output a positive reference voltage to a positive resistance string. The second supply voltage is less than the first supply voltage. The negative polarity buffer receives the second supply voltage and a third supply voltage to output a negative reference voltage to a negative resistance string. The third supply voltage is less than the second supply voltage.

Abstract translation: 公开了一种缓冲电路，显示模块和显示驱动方法。 缓冲电路包括正极性缓冲器，负极性缓冲器。 正极性缓冲器接收第一电源电压和第二电源电压，以将正参考电压输出到正电阻串。 第二电源电压小于第一电源电压。 负极性缓冲器接收第二电源电压和第三电源电压，以将负参考电压输出到负电阻串。 第三电源电压小于第二电源电压。

公开(公告)号：US20180254012A1

公开(公告)日：2018-09-06

申请号：US15969763

申请日：2018-05-02

Applicant: NOVATEK MICROELECTRONICS CORP.

Inventor： Chieh-An LIN ,  Chun-Yung CHO ,  Jhih-Siou CHENG

IPC: G09G3/36

CPC classification number: G09G3/3614 ,  G09G3/3685 ,  G09G2310/027 ,  G09G2310/0291

Abstract: A buffer circuit, a display module, and a display driving method are disclosed. The buffer circuit comprises a first polarity buffer, a negative polarity buffer. The first polarity buffer receives a first supply voltage and a second supply voltage to output a first reference voltage to a first resistance string. The second supply voltage is less than the first supply voltage. The negative polarity buffer receives the second supply voltage and a third supply voltage to output a negative reference voltage to a negative resistance string. The third supply voltage is less than the second supply voltage.