公开(公告)号：US10241798B2

公开(公告)日：2019-03-26

申请号：US14033378

申请日：2013-09-20

Applicant: NVIDIA CORPORATION

Inventor： Peter Sommers ,  Peter Nelson ,  Aniket Naik ,  John H. Edmondson

IPC: G06F9/38

Abstract: An issue control unit is configured to control the rate at which an instruction issue unit issues instructions to an execution pipeline in order to avoid spikes in power drawn by that execution pipeline. The issue control unit maintains a history buffer that reflects, for N previous cycles, the number of instructions issued during each of those N cycles. If the total number of instructions issued during the N previous cycles exceeds a threshold value, then the issue control unit throttles the instruction issue unit from issuing instructions during a subsequent cycle. In addition, the issue control unit increases the threshold value in proportion to the number of previously issued instructions and based on a variety of configurable parameters. Accordingly, the issue control unit maintains granular control over the rate with which the instruction issue unit “ramps up” to a maximum instruction issue rate.

公开(公告)号：US10043230B2

公开(公告)日：2018-08-07

申请号：US14033383

申请日：2013-09-20

Applicant: NVIDIA CORPORATION

Inventor： Philip Payman Shirvani ,  Peter Sommers ,  Eric T. Anderson

IPC: G06T1/20 ,  G06F1/30

Abstract: Computer and graphics processing elements, connected generally in series, form a pipeline. Circuit elements known as di/dt throttles are inserted within the pipeline at strategic locations where the potential exists for data flow to transition from an idle state to a maximum data processing rate. The di/dt throttles gently ramp the rate of data flow from idle to a typical level. Disproportionate current draw and the consequent voltage droop are thus avoided, allowing an increased frequency of operation to be realized.