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公开(公告)号：US20230237308A1
公开(公告)日：2023-07-27
申请号：US17814957
申请日：2022-07-26
Applicant: NVIDIA Corporation
Inventor： Charbel Sakr , Steve Haihang Dai , Brucek Kurdo Khailany , William James Dally , Rangharajan Venkatesan , Brian Matthew Zimmer
Abstract: Quantizing tensors and vectors processed within a neural network reduces power consumption and may accelerate processing. Quantization reduces the number of bits used to represent a value, where decreasing the number of bits used can decrease the accuracy of computations that use the value. Ideally, quantization is performed without reducing accuracy. Quantization-aware training (QAT) is performed by dynamically quantizing tensors (weights and activations) using optimal clipping scalars. “Optimal” in that the mean squared error (MSE) of the quantized operation is minimized and the clipping scalars define the degree or amount of quantization for various tensors of the operation. Conventional techniques that quantize tensors during training suffer from high amounts of noise (error). Other techniques compute the clipping scalars offline through a brute force search to provide high accuracy. In contrast, the optimal clipping scalars can be computed online and provide the same accuracy as the clipping scalars computed offline.
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公开(公告)号：US08861290B2
公开(公告)日：2014-10-14
申请号：US13710314
申请日：2012-12-10
Applicant: NVIDIA Corporation
Inventor： Brian Matthew Zimmer , Mahmut Ersin Sinangil
CPC classification number: G11C7/12 , G11C11/419
Abstract: A method and a system are provided for performing write assist. Write assist circuitry is initialized and voltage collapse is initiated to reduce a column supply voltage provided to a storage cell. A bitline of the storage cell is boosted to a boosted voltage level that is below a low supply voltage provided to the storage cell and data encoded by the bitline is written to the storage cell.
Abstract translation: 提供了一种用于执行写入辅助的方法和系统。 写入辅助电路被初始化并且开始电压崩溃以减小提供给存储单元的列电源电压。 存储单元的位线被提升到低于提供给存储单元的低电源电压的升压电压，并且由位线编码的数据被写入存储单元。
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公开(公告)号：US10326625B1
公开(公告)日：2019-06-18
申请号：US15881661
申请日：2018-01-26
Applicant: NVIDIA Corporation
Inventor： Nikola Nedovic , Brian Matthew Zimmer
Abstract: A single-ended signal transmission system recovers a noise signal associated with a data input signal and uses the recovered noise signal to compensate for noise on the data input signal. The noise signal may be recovered from a noise reference signal line, or clock signal line, or a data signal line associated with a DC-balanced data input signal. The recovered noise signal may be represented as an analog signal or a digital signal. The recovered noise signal may be processed to compensate for DC offset and nonlinearities associated with one or more different input buffers. In one embodiment, the recovered noise signal includes frequency content substantially below a fundamental frequency for data transmission through the data input signal.
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公开(公告)号：US08879350B2
公开(公告)日：2014-11-04
申请号：US13672616
申请日：2012-11-08
Applicant: NVIDIA Corporation
Inventor： Brucek Kurdo Khailany , Brian Matthew Zimmer
IPC: G11C11/413 , G11C14/00
CPC classification number: G11C11/417 , G11C5/144 , G11C5/148
Abstract: A processor and a system are provided for tuning a supply voltage for data retention. The contents of data storage circuitry are read and a data verification indication corresponding to the contents is computed. Then, the supply voltage provided to the data storage circuitry is reduced to a low voltage level that is intended to retain the contents of the data storage circuitry.
Abstract translation: 提供一个处理器和一个系统来调整电源电压以进行数据保留。 读取数据存储电路的内容，并计算与内容相对应的数据验证指示。 然后，提供给数据存储电路的电源电压降低到旨在保持数据存储电路的内容的低电压电平。
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Patent Agency Ranking
公开(公告)号：US20190238168A1
公开(公告)日：2019-08-01
申请号：US16212549
申请日：2018-12-06
Applicant: NVIDIA Corporation
Inventor： Nikola Nedovic , Brian Matthew Zimmer
CPC classification number: H04B1/10 , H04B1/0475 , H04B1/16 , H04L5/0048
Abstract: A single-ended signal transmission system recovers a noise signal associated with a data input signal and uses the recovered noise signal to compensate for noise on the data input signal. The noise signal may be recovered from a noise reference signal line, or clock signal line, or a data signal line associated with a DC-balanced data input signal. The recovered noise signal may be represented as an analog signal or a digital signal. The recovered noise signal may be processed to compensate for DC offset and nonlinearities associated with one or more different input buffers. In one embodiment, the recovered noise signal includes frequency content substantially below a fundamental frequency for data transmission through the data input signal.
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公开(公告)号：US20140160871A1
公开(公告)日：2014-06-12
申请号：US13710314
申请日：2012-12-10
Applicant: NVIDIA CORPORATION
Inventor： Brian Matthew Zimmer , Mahmut Ersin Sinangil
IPC: G11C7/12
CPC classification number: G11C7/12 , G11C11/419
Abstract: A method and a system are provided for performing write assist. Write assist circuitry is initialized and voltage collapse is initiated to reduce a column supply voltage provided to a storage cell. A bitline of the storage cell is boosted to a boosted voltage level that is below a low supply voltage provided to the storage cell and data encoded by the bitline is written to the storage cell.
Abstract translation: 提供了一种用于执行写入辅助的方法和系统。 写入辅助电路被初始化并且开始电压崩溃以减小提供给存储单元的列电源电压。 存储单元的位线被提升到低于提供给存储单元的低电源电压的升压电压，并且由位线编码的数据被写入存储单元。
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公开(公告)号：US10476537B2
公开(公告)日：2019-11-12
申请号：US16212549
申请日：2018-12-06
Applicant: NVIDIA Corporation
Inventor： Nikola Nedovic , Brian Matthew Zimmer
Abstract: A single-ended signal transmission system recovers a noise signal associated with a data input signal and uses the recovered noise signal to compensate for noise on the data input signal. The noise signal may be recovered from a noise reference signal line, or clock signal line, or a data signal line associated with a DC-balanced data input signal. The recovered noise signal may be represented as an analog signal or a digital signal. The recovered noise signal may be processed to compensate for DC offset and nonlinearities associated with one or more different input buffers. In one embodiment, the recovered noise signal includes frequency content substantially below a fundamental frequency for data transmission through the data input signal.
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公开(公告)号：US10187094B1
公开(公告)日：2019-01-22
申请号：US15881647
申请日：2018-01-26
Applicant: NVIDIA Corporation
Inventor： Nikola Nedovic , Brian Matthew Zimmer
Abstract: A single-ended signal transmission system recovers a noise signal associated with a data input signal and uses the recovered noise signal to compensate for noise on the data input signal. The noise signal may be recovered from a noise reference signal line, or clock signal line, or a data signal line associated with a DC-balanced data input signal. The recovered noise signal may be represented as an analog signal or a digital signal. The recovered noise signal may be processed to compensate for DC offset and nonlinearities associated with one or more different input buffers. In one embodiment, the recovered noise signal includes frequency content substantially below a fundamental frequency for data transmission through the data input signal.
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公开(公告)号：US20140126275A1
公开(公告)日：2014-05-08
申请号：US13672616
申请日：2012-11-08
Applicant: NVIDIA CORPORATION
Inventor： Brucek Kurdo Khailany , Brian Matthew Zimmer
IPC: G11C14/00
CPC classification number: G11C11/417 , G11C5/144 , G11C5/148
Abstract: A processor and a system are provided for tuning a supply voltage for data retention. The contents of data storage circuitry are read and a data verification indication corresponding to the contents is computed. Then, the supply voltage provided to the data storage circuitry is reduced to a low voltage level that is intended to retain the contents of the data storage circuitry.
Abstract translation: 提供一个处理器和一个系统来调整电源电压以进行数据保留。 读取数据存储电路的内容，并计算与内容相对应的数据验证指示。 然后，提供给数据存储电路的电源电压降低到旨在保持数据存储电路的内容的低电压电平。
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