公开(公告)号：US11653455B2

公开(公告)日：2023-05-16

申请号：US17186868

申请日：2021-02-26

Applicant: NVIDIA CORPORATION

Inventor： Mingyi Yu ,  Gregory Patrick Bodi

IPC: H05K1/00 ,  H05K1/11 ,  H05K1/14 ,  H05K3/00 ,  H05K3/06 ,  H05K3/24 ,  H05K3/40 ,  H05K3/44 ,  H05K3/04

CPC classification number: H05K3/242 ,  H05K1/117 ,  H05K3/0047 ,  H05K3/043 ,  H05K2201/0347

Abstract: A method for forming a printed circuit board includes: forming on a substrate a first conductive layer for a first edge connector pin and a first conductive layer for a second edge connector pin, wherein the first conductive layer for the first edge connector pin and the first conductive layer for the second edge connector pin are electrically coupled to one another via a first conductive layer for an electrical bridging element; electroplating a second conductive layer onto both the first conductive layer for the first edge connector pin and the first conductive layer for the second edge connector pin via a plating current conductor; and removing at least a portion of the electrical bridging element to electrically separate the first edge connector pin from the second edge connector pin.

公开(公告)号：US20240389230A1

公开(公告)日：2024-11-21

申请号：US18197146

申请日：2023-05-15

Applicant: NVIDIA Corporation

Inventor： Mingyi Yu ,  Gregory Patrick Bodi ,  Gabriele Gorla ,  Xiang Sun

IPC: H05K1/11 ,  H05K3/46

Abstract: A printed circuit board (PCB) includes an exterior section having a first set of layers including an outermost conductive layer. The PB further includes an interior section, adjacent to the exterior section, having a second set of layers including a first conductive layer corresponding to a first end of the interior section, a second conductive layer corresponding to a second end of the interior section opposite the first end, and a third conductive layer disposed between the first conductive layer and the second conductive layer. The exterior section further includes a set of vias extending from an outermost conductive layer to the first conductive layer. The interior section further includes a buried skip via extending from the first conductive layer to the third conductive layer.

公开(公告)号：US11439002B2

公开(公告)日：2022-09-06

申请号：US17081916

申请日：2020-10-27

Applicant: NVIDIA CORPORATION

Inventor： Mingyi Yu ,  Ananta H. Attaluri ,  Gregory Patrick Bodi ,  Carmen A. Capillo, Jr. ,  Michael James Warner

IPC: H05K1/02 ,  H05K3/00 ,  H05K3/42

Abstract: A printed circuit board includes a first voltage plane disposed on a first surface of a first electrically insulating layer and a second voltage plane. An inter-layer slot that is formed through the first electrically insulating layer and includes an electrically conductive material electrically couples the first voltage plane to the second voltage plane.