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公开(公告)号:US20240094796A1
公开(公告)日:2024-03-21
申请号:US17837354
申请日:2022-06-10
Applicant: NVIDIA Corporation
Inventor: Sreedhar Narayanaswamy , Kyle John O'Shaughnessy , Pratikkumar Dilipkumar Patel , Chad R. Plummer , Benjamin D. Faulkner
IPC: G06F1/324 , G06F1/3237 , G06F1/3296
CPC classification number: G06F1/324 , G06F1/3237 , G06F1/3296
Abstract: Apparatuses, systems, and techniques to optimize performance of a processor group. In at least one embodiment, a method increases a processor's clock frequency based, at least in part, on performance of other processors in a group.
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公开(公告)号:US20250021149A1
公开(公告)日:2025-01-16
申请号:US18221619
申请日:2023-07-13
Applicant: NVIDIA Corporation
Inventor: Tejvansh Singh Soni , Xutong Li , Sreedhar Narayanaswamy , Chad Plummer , Pratikkumar Dilipkumar Patel , Tao Li
IPC: G06F1/28 , G06F1/3296
Abstract: A system includes a processing unit coupled with one or more switches via one or more links. The processing unit is to determine a total threshold power value associated with the processing unit and the one or more links and estimate a power consumption value associated with a switch of the one or more switches. The processing unit can also determine the power consumption value of the switch and a second power consumption value of the processing unit fail to satisfy the total power threshold value and responsive to determining the power consumption value and the second power consumption value fail to satisfy the total power threshold value, increase an amount of power supplied to the processing unit to satisfy the total power threshold value.
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公开(公告)号:US20240004705A1
公开(公告)日:2024-01-04
申请号:US17856368
申请日:2022-07-01
Applicant: NVIDIA Corporation
Inventor: Chad Robert Plummer , Pratikkumar Dilipkumar Patel , Jun Gu , Tao Li , Divya Ramakrishnan , Michael Houston
IPC: G06F9/48
CPC classification number: G06F9/4893
Abstract: A device comprises one or more circuits that dynamically adjust a load profile of one or more processing devices processing a workload in a bulk-synchronous mode.
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