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公开(公告)号:US20220026967A1
公开(公告)日:2022-01-27
申请号:US16934395
申请日:2020-07-21
Applicant: NVIDIA Corporation
Inventor: Jun Gu , Tao Li , Chad Plummer , Brian Lawrence Smith
IPC: G06F1/20
Abstract: Integrated circuits (ICs)—depending on a current workload—may exceed thermal cooling budgets. As a result, ICs often implement thermal sensors to measure temperatures at junctions or hot spots along the IC. Due to a distance between the thermal sensors and the various junctions, a thermal offset may be added to the temperature readings from the thermal sensors to more accurately estimate the temperature at the junctions. To account for different workload distributions—e.g., asymmetric or symmetric—the systems and methods described herein may dynamically adjust the thermal offsets. As a result, the efficiency of the IC may be increased as thermal settings for the IC may take into account the ability of the thermal cooling budget to effectively cool the IC under a current operating condition—thereby reducing premature throttling back or shutting down of power to the IC.
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公开(公告)号:US11231760B1
公开(公告)日:2022-01-25
申请号:US16934395
申请日:2020-07-21
Applicant: NVIDIA Corporation
Inventor: Jun Gu , Tao Li , Chad Plummer , Brian Lawrence Smith
IPC: G06F1/20
Abstract: Integrated circuits (ICs)—depending on a current workload—may exceed thermal cooling budgets. As a result, ICs often implement thermal sensors to measure temperatures at junctions or hot spots along the IC. Due to a distance between the thermal sensors and the various junctions, a thermal offset may be added to the temperature readings from the thermal sensors to more accurately estimate the temperature at the junctions. To account for different workload distributions—e.g., asymmetric or symmetric—the systems and methods described herein may dynamically adjust the thermal offsets. As a result, the efficiency of the IC may be increased as thermal settings for the IC may take into account the ability of the thermal cooling budget to effectively cool the IC under a current operating condition—thereby reducing premature throttling back or shutting down of power to the IC.
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公开(公告)号:US20240004705A1
公开(公告)日:2024-01-04
申请号:US17856368
申请日:2022-07-01
Applicant: NVIDIA Corporation
Inventor: Chad Robert Plummer , Pratikkumar Dilipkumar Patel , Jun Gu , Tao Li , Divya Ramakrishnan , Michael Houston
IPC: G06F9/48
CPC classification number: G06F9/4893
Abstract: A device comprises one or more circuits that dynamically adjust a load profile of one or more processing devices processing a workload in a bulk-synchronous mode.
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