公开(公告)号：US11057396B2

公开(公告)日：2021-07-06

申请号：US15906437

申请日：2018-02-27

Applicant: NXP B.V.

Inventor： Artur Burchard ,  Tomasz Szuprycinski

IPC: H04L29/06 ,  H04L9/30 ,  H04L9/32 ,  G09C1/00

Abstract: An intelligent transportation system, ITS, station (600) comprising: a host processor (640); and a memory (664) operably coupled to the host processor (640). The host processor (640) is configured to: perform verification per identity that includes precomputation of data for a plurality of neighbouring ITS stations of the ITS station (600); store precomputation data for the verified identity of the plurality of neighbouring ITS stations in the memory (664); and extract from memory (664) and use the stored precomputation data for a respective neighbouring ITS station to perform an accelerated verification of a subsequent message received from that neighbouring ITS station.

公开(公告)号：US11324013B2

公开(公告)日：2022-05-03

申请号：US16829254

申请日：2020-03-25

Applicant: NXP B.V.

Inventor： Artur Burchard ,  Alessio Filippi ,  Marc Klaassen ,  Cornelis Marinus Moerman

IPC: H04W72/08 ,  H04B17/345 ,  H04W16/14 ,  H04B17/336 ,  H04L5/00

Abstract: Aspects of the present disclosure are directed toward effecting communications in a manner that suppresses side-channel communications that may otherwise cause interference. As may be implemented in a manner consistent with one or more aspects characterized herein, an apparatus and/or method involve transmitting enhanced signals for in-band transmissions over a first one of a plurality of wireless communications channels shared by a plurality of stations for communicating wireless station-to-station communications. While transmitting the enhanced signals, communications by legacy devices on a second one of the wireless communications channels adjacent the first channel are suppressed by generating and transmitting a side channel interference signal on the second channel, therein causing legacy devices receiving the enhanced signals to withhold communications on the second channel.

公开(公告)号：US20210307019A1

公开(公告)日：2021-09-30

申请号：US16829254

申请日：2020-03-25

Applicant: NXP B.V.

Inventor： Artur Burchard ,  Alessio Filippi ,  Marc Klaassen ,  Cornelis Marinus Moerman

IPC: H04W72/08 ,  H04B17/345 ,  H04L5/00 ,  H04B17/336 ,  H04W16/14

Abstract: Aspects of the present disclosure are directed toward effecting communications in a manner that suppresses side-channel communications that may otherwise cause interference. As may be implemented in a manner consistent with one or more aspects characterized herein, an apparatus and/or method involve transmitting enhanced signals for in-band transmissions over a first one of a plurality of wireless communications channels shared by a plurality of stations for communicating wireless station-to-station communications. While transmitting the enhanced signals, communications by legacy devices on a second one of the wireless communications channels adjacent the first channel are suppressed by generating and transmitting a side channel interference signal on the second channel, therein causing legacy devices receiving the enhanced signals to withhold communications on the second channel.

公开(公告)号：US11036657B2

公开(公告)日：2021-06-15

申请号：US16401609

申请日：2019-05-02

Applicant: NXP B.V.

Inventor： Marinus van Splunter ,  Arie Koppelaar ,  Artur Burchard

IPC: G06F13/16

Abstract: A writing-block for writing data to a memory-buffer, wherein the memory-buffer comprises an ordered sequence of elements and the writing-block is configured to: receive an input-data-stream; and write the input-data-stream to the memory-buffer in a successive manner from a first-element of the ordered sequence to a predetermined-element of the ordered sequence. Following writing to the predetermined-element the writing-block is configured to continue to write the input-data-stream to the memory-buffer in a successive manner restarting at the first-element. In response to writing the predetermined-element, the writing-block is configured to also continue to write the input-data-stream to the memory-buffer in a successive manner from an element immediately following the predetermined element until a second predetermined-element of the memory-buffer.

公开(公告)号：US20180288069A1

公开(公告)日：2018-10-04

申请号：US15906437

申请日：2018-02-27

Applicant: NXP B.V.

Inventor： Artur Burchard ,  Tomasz Szuprycinski

IPC: H04L29/06 ,  H04L9/30

Abstract: An intelligent transportation system, ITS, station (600) comprising: a host processor (640); and a memory (664) operably coupled to the host processor (640). The host processor (640) is configured to: perform verification per identity that includes precomputation of data for a plurality of neighbouring ITS stations of the ITS station (600); store precomputation data for the verified identity of the plurality of neighbouring ITS stations in the memory (664); and extract from memory (664) and use the stored precomputation data for a respective neighbouring ITS station to perform an accelerated verification of a subsequent message received from that neighbouring ITS station.