Synchronous rectifier for wireless charging system

    公开(公告)号:US11165364B2

    公开(公告)日:2021-11-02

    申请号:US16283845

    申请日:2019-02-25

    Applicant: NXP B.V.

    Abstract: A synchronous rectifier converts an AC input into a DC output. The synchronous rectifier has four switches controlled by four switch control modules. Each switch is connected between a different AC component and either the DC output or ground. Each switch control module has digitally assisted “switch on” circuitry that detects “on” bounces in the corresponding AC component to control when to turn on the corresponding switch and digitally assisted “switch off” circuitry that detects “off” bounces in the AC component to control when to turn off the corresponding switch. The “switch on” circuitry has a digitally assisted comparator to detect threshold crossings in the AC component, and the “switch off” circuitry has a digitally assisted programmable delay cell to turn off the switch for a predetermined duration following each detected threshold crossing.

    MIS CAPACITOR AND METHOD OF MAKING A MIS CAPACITOR

    公开(公告)号:US20230006072A1

    公开(公告)日:2023-01-05

    申请号:US17807869

    申请日:2022-06-21

    Applicant: NXP B.V.

    Abstract: A MIS capacitor and a method of making the same. The capacitor includes a semiconductor substrate having a first part having a first conductivity type and contact regions for coupling the first part to an output node. The substrate has dielectric on a surface of the first part and electrodes on the dielectric. The substrate has a second part having a second conductivity type and a third part having the first conductivity type. The third part is coupleable to a supply voltage. The second part is located between the first part and the third part. The first part and the second part form a first p-n junction and the second part and the third part form a second p-n junction. A reference contact is provided for coupling the second part to a reference voltage. A further contact region is provided for coupling the second part to the output node.

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